EMC6D100-DK SMSC [SMSC Corporation], EMC6D100-DK Datasheet - Page 47

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EMC6D100-DK

Manufacturer Part Number
EMC6D100-DK
Description
ENVIRONMENTAL MONITORING AND CONTROL DEVICE WITH AUTOMATIC FAN CAPABILITY
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Environmental Monitoring and Control Device
Datasheet
8.12
SMSC EMC6D100/EMC6D101
REGISTER
ADDRESS
BIT
BIT
7
42h
0
1
2
3
4
5
6
7
INT2, 3 Event
Active
+12v_Error
Reserved
Fan1 Stalled
Fan2 Stalled
Fan3 Stalled
Fan4 Stalled
Remote Diode
1 Fault
Remote Diode
2 Fault
Register 42h: Interrupt Status Register 2
Note 1: This register is cleared on a read if no events are active
The Interrupt Status Register 2 bits is automatically set by the EMC6D100/EMC6D101 whenever a remote
temperature sensor error occurs, a fan is above the minimum speed set in the tachometer minimum
registers, or whenever the 12V input voltage violates the limits set in the limit and parameter registers.
The Interrupt Status Register 2 register holds a set bit until the event is read by software.
The contents of this register are cleared (set to 0) automatically by the EMC6D100/EMC6D101 after it is
read by software, if the voltage or temperature no longer violates the limits set in the limit and parameter
registers, or if the fan reading register is no longer above the minimum. Once set, the Interrupt Status
Register 2 bits remain set until a read event occurs, even if the voltage or temperature no longer violates
the limits set in the limit and parameter registers or if the fan reading register is below the minimum.
The remote diode fault bits do not clear on a read while the fault condition exists. A fault event loads 80h
into the associated temperature reading register when the start bit is set, which will cause the associated
diode limit error bit to be set (Zone 1 Limit Exceeded or Zone 3 Limit Exceeded) in addition to the diode
fault bit. Disabling the enable bit for the diode will clear both the fault bit and the error bit for that diode.
This register is read only – a write to this register has no effect.
NAME
WRITE
READ/
NAME
R-C
1
Register 2
REGISTER
Interrupt
Status
NAME
R/W
R/W
R
R
R
R
R
R
R
R
R
DEFAULT
DEFAULT
0
(MSB)
ERR2
BIT 7
0
0
0
0
0
0
0
0
DATASHEET
ERR1
The EMC6D100/EMC6D101 automatically sets this bit to 1 when
a status bit is set in either Interrupt Status Register 2 or 3.
BIT 6
The EMC6D100/EMC6D101 automatically sets this bit to 1
when the 12V input voltage is less than or equal to the limit set
in the 12V Low Limit register or greater than the limit set in the
12V High Limit register.
Reserved
The EMC6D100/EMC6D101 automatically sets this bit to 1
when the TACH1 input reading is above the value set in the
Tach1 Minimum MSB and LSB registers.
The EMC6D100/EMC6D101 automatically sets this bit to 1
when the TACH2 input reading is above the value set in the
Tach2 Minimum MSB and LSB registers.
The EMC6D100/EMC6D101 automatically sets this bit to 1
when the TACH3 input reading is above the value set in the
Tach3 Minimum MSB and LSB registers.
The EMC6D100/EMC6D101 automatically sets this bit to 1
when the TACH4 input reading is above the value set in the
Tach4 Minimum MSB and LSB registers.
The EMC6D100/EMC6D101 automatically sets this bit to 1
when there is either a short or open circuit fault on the
Remote1+ or Remote1- thermal diode input pins.
The EMC6D100/EMC6D101 automatically sets this bit to 1
when there is either a short or open circuit fault on the
Remote2+ or Remote2- thermal diode input pins.
Page 47
BIT 5
FAN4
FAN3
BIT 4
FAN2
BIT 3
DESCRIPTION
DESCRIPTION
BIT 2
FAN1
BIT 1
RES
(LSB)
BIT 0
12V
Rev. 09-09-04
DEFAULT
VALUE
00h

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