EMC6D100-DK SMSC [SMSC Corporation], EMC6D100-DK Datasheet - Page 59

• Manufacturer Part Number: EMC6D100-DK
• Description: ENVIRONMENTAL MONITORING AND CONTROL DEVICE WITH AUTOMATIC FAN CAPABILITY
• Manufacturer: SMSC [SMSC Corporation]

REGISTER
Environmental Monitoring and Control Device
Datasheet
8.25
ADDRESS
8.26
SMSC EMC6D100/EMC6D101
REGISTER
ADDRESS
6Fh
79h
Register 6F: XOR Test Register
This register becomes read only when the Lock bit is set. Any further attempts to write to this register shall
have no effect.
The part incorporates an XOR tree test mode. When the test mode is enabled by setting the ‘XEN’ bit high
via SMBus, the part enters XOR test mode.
The following signals are included in the XOR test tree:
Since the test mode is XOR tree, the order of the signals in the tree is not important. SDA and SCL are not
included in the test tree.
Register 79h: Test Mode Register
This register becomes read only when the Lock bit is set. Any further attempts to write to this register shall
have no effect.
This register contains the following bits:
Bit[0]
Selects the ADC test mode. The default for this bit is zero, which deactivates ADC test mode.
Bit[1]
Selects the digital test mode. The default for this bit is zero, which deactivates digital test mode.
WRITE
READ/
READ/
WRITE
R/W
R/W
VID0, VID1, VID2, VID3, VID4
TACH1, TACH2, TACH3, TACH4
PWM2, PWM3, INT#
REGISTER
Test Mode ANTST2 ANTST1 ANTST0
NAME
REGISTER
XOR Test
Register
NAME
(MSB)
BIT 7
0h
5h
Fh
(MSB)
BIT 7
RES
Table 8.15 - Hysteresis Settings
BIT 6
SETTING
DATASHEET
BIT 6
RES
BIT 5
Page 59
BIT 5
RES
0°C
5°C
15°C
OSCSEL ADCAVG EXTCLK DIGTST ADCTST
BIT 4
HYSTERESIS
BIT 4
RES
BIT 3
BIT 3
RES
BIT 2
BIT 2
RES
BIT 1
BIT 1
RES
(LSB)
BIT 0
(LSB)
BIT 0
XEN
Rev. 09-09-04
DEFAULT
DEFAULT
VALUE
VALUE
00h
00h