DM9008AEP_06 DAVICOM [Davicom Semiconductor, Inc.], DM9008AEP_06 Datasheet - Page 2
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DM9008AEP_06
Manufacturer Part Number
DM9008AEP_06
Description
Ethernet Controller with General Processor Interface
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet
1.DM9008AEP_06.pdf
(50 pages)
1. General Description........................................................................................................... 6
2. Block Diagram.................................................................................................................... 6
3. Features.............................................................................................................................. 7
4. Pin Configuration............................................................................................................... 8
5. Pin Description .................................................................................................................. 9
6. Vendor Control and Status Register Set ....................................................................... 12
Preliminary
Version: DM9008A-DS-P02
Apr. 11, 2006
5.1 Processor Interface................................................................................................................................... 9
5.2 EEPROM Interface ................................................................................................................................... 9
5.3 Clock Interface ........................................................................................................................................ 10
5.4 LED Interface .......................................................................................................................................... 10
5.5 10/100 PHY/Fiber ................................................................................................................................... 10
5.6 Miscellaneous ......................................................................................................................................... 10
5.7 Power Pins.............................................................................................................................................. 11
5.8 strap pins table........................................................................................................................................ 11
6.1 Network Control Register (00H).............................................................................................................. 13
6.2 Network Status Register (01H) ............................................................................................................... 14
6.3 TX Control Register (02H) ...................................................................................................................... 14
6.4 TX Status Register I ( 03H ) for packet index I ....................................................................................... 14
6.5 TX Status Register II ( 04H ) for packet index I I .................................................................................... 15
6.6 RX Control Register ( 05H ).................................................................................................................... 15
6.7 RX Status Register ( 06H ) ..................................................................................................................... 15
6.8 Receive Overflow Counter Register ( 07H ) ........................................................................................... 16
6.9 Back Pressure Threshold Register (08H) ............................................................................................... 16
6.10 Flow Control Threshold Register ( 09H ) .............................................................................................. 16
6.11 RX/TX Flow Control Register ( 0AH ) ................................................................................................... 17
6.12 EEPROM & PHY Control Register ( 0BH )........................................................................................... 17
6.13 EEPROM & PHY Address Register ( 0CH ) ......................................................................................... 17
6.14 EEPROM & PHY Data Register (EE_PHY_L:0DH
6.15 Wake Up Control Register ( 0FH ) (in 8-bit mode) ............................................................................... 18
6.16 Physical Address Register ( 10H~15H ) ............................................................................................... 18
6.17 Multicast Address Register ( 16H~1DH ).............................................................................................. 18
Content
Ethernet Controller with General Processor Interface
EE_PHY_H:0EH)........................................ 17
DM9008AEP
2