DM9008AEP_06 DAVICOM [Davicom Semiconductor, Inc.], DM9008AEP_06 Datasheet - Page 22
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DM9008AEP_06
Manufacturer Part Number
DM9008AEP_06
Description
Ethernet Controller with General Processor Interface
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet
1.DM9008AEP_06.pdf
(50 pages)
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6.32 Processor Bus Control Register ( 38H )
Preliminary
Version: DM9008AEP-DS-P03
Dec. 14, 2006
7:5
Bit
0
4
3
2
1
0
IOW_SPIKE
IOR_SPIKE
CURR
Name
Reserved
Reserved
GPIO
MII
P011,RO
Default
P0,RW
P0,RW
P0,RW
P0,RW
P0,RW
P1,RW
LED act as SMI signals in 16-bit mode
1: Pin 38/39 (LED2/1) act as the MII Management Interface mode.
Data Bus Current Driving/Sinking Capability
000: 2mA
001: 4mA
010: 6mA
011: 8mA (default)
100: 10mA
101: 12mA
110: 14mA
111: 16mA
Reserved
Enable Schmitt Trigger
1: Pin 35/36/37 (IOR/IOW/CS#) have Schmitt trigger capability.
Reserved
Eliminate IOW spike
1: eliminate about 2ns IOW spike
Eliminate IOR spike
1: eliminate about 2ns IOR spike
In this mode, the LED1 act as data (MDIO) signal and the LED2 act as
These two pin are controlled by registers 0Bh,0Ch, and 0Dh.
sourced clock (MDC) signal.
Ethernet Controller with General Processor Interface
Description
DM9008AEP
22
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