AD9653BCPZ-125 Analog Devices, AD9653BCPZ-125 Datasheet - Page 23

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AD9653BCPZ-125

Manufacturer Part Number
AD9653BCPZ-125
Description
the ad9653 is a quad, 16-bit, 125 msps analog-to-digital converter (adc) with an...
Manufacturer
Analog Devices
Datasheet

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AD9653BCPZ-125
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Quantity:
20 000
Data Sheet
Differential Input Configurations
There are several ways to drive the
passively. However, optimum performance is achieved by driving
the analog inputs differentially. Using a differential double balun
configuration to drive the
and a flexible interface to the ADC (see Figure 56) for baseband
applications.
For applications where SNR is a key parameter, differential trans-
former coupling is the recommended input configuration (see
Figure 57), because the noise performance of most amplifiers is
not adequate to achieve the true performance of the AD9653.
Regardless of the configuration, the value of the shunt capacitor,
C, is dependent on the input frequency and may need to be
reduced or removed.
It is not recommended to drive the
VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD9653.
VREF can be configured using either the internal 1.0 V refer-
ence, an externally applied 1.0 V to 1.3 V reference voltage, or
using an external resistor divider applied to the internal refer-
ence to produce a reference voltage of the user’s choice. The
various reference modes are summarized in the Internal Reference
Connection section and the External Reference Operation
section. The VREF pin should be externally bypassed to ground
with a low ESR, 1.0 μF capacitor in parallel with a low ESR,
0.1 μF ceramic capacitor.
Table 11. Reference Configuration Summary
Selected Mode
Fixed Internal Reference
Programmable Internal Reference
Fixed External Reference
1
Normal operation for V
100
110
90
80
70
60
50
40
30
20
0.6
Figure 53. SNR/SFDR vs. Common-Mode Voltage,
f
IN
0.7
= 9.7 MHz, f
REF
COMMON-MODE VOLTAGE (V)
0.8
= 1.3 V is supported over the 0°C to 85°C temperature range.
AD9653
SAMPLE
SNRFS (dBFS)
SFDR (dBc)
0.9
= 125 MSPS, V
AD9653
provides excellent performance
AD9653
1.0
SENSE Voltage (V)
AGND to 0.2
Tie to external R-divider
(see Figure 55)
AVDD
1.1
REF
inputs single-ended.
either actively or
= 1.3 V
1.2
1.3
Rev. 0 | Page 23 of 40
Resulting V
1.0 internal
0.5 × (1 + R2/R1), example: R1 = 3.5 kΩ,
R2 = 5.6 kΩ for V
1.0 to 1.3 applied to external VREF pin
Internal Reference Connection
A comparator within the
SENSE pin and configures the reference into one of three
possible modes, which are summarized in Table 11. If SENSE is
grounded, the reference amplifier switch is connected to the
internal resistor divider (see Figure 54), setting the voltage at the
VREF pin, V
resistor divider (see Figure 55), V
where:
REF
7 kΩ ≤ (R1 + R2) ≤ 10 kΩ
V
REF
1.0µF
(V)
Figure 55. Programmable Internal Reference Configuration
REF
=
1.0µF
= 1.3 V
Figure 54. 1.0 V Internal Reference Configuration
REF
0
+
5 .
0.1µF
, to 1.0 V. If SENSE is connected to an external
×
 +
1
1
0.1µF
SENSE
VIN+A
VIN–A
VREF
R2
R1
R2
R1
VIN+A
VIN–A
SENSE
AD9653
VREF
1
REF
SELECT
LOGIC
Resulting Differential Span
(V p-p)
2.0
2 × V
2.0 to 2.6
detects the potential at the
is defined as
SELECT
LOGIC
REF
AD9653
0.5V
AD9653
CORE
ADC
0.5V
CORE
ADC
AD9653

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