C8051F960-A-GQ Silicon Labs, C8051F960-A-GQ Datasheet - Page 294
![no-image](/images/no-image-200.jpg)
C8051F960-A-GQ
Manufacturer Part Number
C8051F960-A-GQ
Description
8-bit Microcontrollers - MCU 128KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F960-A-GQ
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
128 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F960-A-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F960-A-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051F96x
SFR Definition 23.4. OSCXCN: External Oscillator Control
SFR Page = 0x0; SFR Address = 0xB1
294
Name XCLKVLD
Reset
Type
Bit
6:4
2:0
Bit
7
3
XCLKVLD External Oscillator Valid Flag.
XOSCMD External Oscillator Mode Bits.
Reserved Read = 0b. Must Write 0b.
XFCN
Name
R
7
0
Provides External Oscillator status and is valid at all times for all modes of operation
except External CMOS Clock Mode and External CMOS Clock Mode with divide by
2. In these modes, XCLKVLD always returns 0.
0: External Oscillator is unused or not yet stable.
1: External Oscillator is running and stable.
Configures the external oscillator circuit to the selected mode.
00x: External Oscillator circuit disabled.
010: External CMOS Clock Mode.
011: External CMOS Clock Mode with divide by 2 stage.
100: RC Oscillator Mode.
101: Capacitor Oscillator Mode.
110: Crystal Oscillator Mode.
111: Crystal Oscillator Mode with divide by 2 stage.
External Oscillator Frequency Control Bits.
Controls the external oscillator bias current.
000-111: See Table 23.1 on page 288 (Crystal Mode) or Table 23.2 on page 289 (RC
or C Mode) for recommended settings.
R
6
0
XOSCMD[2:0]
R/W
5
0
R/W
Rev. 0.5
4
0
Function
R/W
3
0
R/W
2
0
XFCN[2:0]
R/W
1
0
R/W
0
0
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