C8051F960-A-GQ Silicon Labs, C8051F960-A-GQ Datasheet - Page 33
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C8051F960-A-GQ
Manufacturer Part Number
C8051F960-A-GQ
Description
8-bit Microcontrollers - MCU 128KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F960-A-GQ
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
128 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F960-A-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F960-A-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051F96x
ADC0MX
P0.0
Programmable
Attenuator
AIN+
ADC0
AMUX
P2.6*
Temp
Sensor
Gain = 0. 5 or 1
VBAT
Digital Supply
VDD/DC+
*P1.7-P2. 6 only available as
inputs on 32- pin packages
Figure 1.14. ADC0 Multiplexer Block Diagram
1.6. Programmable Current Reference (IREF0)
C8051F96x devices include an on-chip programmable current reference (source or sink) with two output
current settings: low power mode and high current mode. The maximum current output in low power mode
is 63 µA (1 µA steps) and the maximum current output in high current mode is 504 µA (8 µA steps).
1.7. Comparators
C8051F96x devices include two on-chip programmable voltage comparators: Comparator 0 (CPT0) which
is shown in Figure 1.15; Comparator 1 (CPT1) which is shown in Figure 1.16. The two comparators oper-
ate identically but may differ in their ability to be used as reset or wake-up sources. See Section “22. Reset
Sources” on page 278 and the Section “19. Power Management” on page 257 for details on reset sources
and low power mode wake-up sources, respectively.
The Comparator offers programmable response time and hysteresis, an analog input multiplexer, and two
outputs that are optionally available at the Port pins: a synchronous “latched” output (CP0, CP1), or an
asynchronous “raw” output (CP0A, CP1A). The asynchronous CP0A signal is available even when the
system clock is not active. This allows the Comparator to operate and generate an output when the device
is in some low power modes.
The comparator inputs may be connected to Port I/O pins or to other internal signals. Port pins may also be
used to directly sense capacitive touch switches. See Application Note AN338 for details on Capacitive
Touch Switch sensing.
Rev. 0.5
33
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