ATSAM3X4EA-AU Atmel, ATSAM3X4EA-AU Datasheet - Page 159
ATSAM3X4EA-AU
Manufacturer Part Number
ATSAM3X4EA-AU
Description
ARM Microcontrollers - MCU QFP144,GREEN, IND TEMP, MRL A
Manufacturer
Atmel
Datasheet
1.ATSAM3X8EA-AU.pdf
(1467 pages)
Specifications of ATSAM3X4EA-AU
Rohs
yes
Core
ARM Cortex M3
Processor Series
SAM3X
Data Bus Width
32 bit
Maximum Clock Frequency
84 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
2.4 V to 3.6 V
Operating Temperature Range
- 40 C to +85 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT
Factory Pack Quantity
60
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12.20.2
• SETENA
Interrupt set-enable bits.
Write:
0: no effect
1: enable interrupt.
Read:
0: interrupt disabled
1: interrupt enabled.
If a pending interrupt is enabled, the NVIC activates the interrupt based on its priority. If an interrupt is not enabled, assert-
ing its interrupt signal changes the interrupt state to pending, but the NVIC never activates the interrupt, regardless of its
priority.
11057B–ATARM–28-May-12
11057B–ATARM–28-May-12
31
23
15
7
Interrupt Set-enable Registers
30
22
14
6
The ISER0-ISER1 register enables interrupts, and show which interrupts are enabled. See:
The bit assignments are:
• the register summary in
•
Table 12-28 on page 158
29
21
13
5
28
20
12
4
Table 12-27 on page 157
SETENA bits
SETENA bits
SETENA bits
SETENA bits
for which interrupts are controlled by each register.
27
19
11
3
for the register attributes
26
18
10
2
25
17
9
1
SAM3X/A
SAM3X/A
24
16
8
0
159
159
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