ATSAM3X4EA-AU Atmel, ATSAM3X4EA-AU Datasheet - Page 98

• Manufacturer Part Number: ATSAM3X4EA-AU
• Description: ARM Microcontrollers - MCU QFP144,GREEN, IND TEMP, MRL A
• Manufacturer: Atmel

Specifications of ATSAM3X4EA-AU

• Rohs: yes
• Core: ARM Cortex M3
• Processor Series: SAM3X
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 84 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 3.6 V
• Operating Temperature Range: - 40 C to +85 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 60

12.11.4.3
12.11.4.4
98
98
SAM3X/A
SAM3X/A
LSL
ROR
Figure 12-5. LSR #3
Logical shift left by n bits moves the right-hand 32-n bits of the register Rm, to the left by n
places, into the left-hand 32-n bits of the result. And it sets the right-hand n bits of the result to 0.
See
You can use he LSL #n operation to multiply the value in the register Rm by 2
regarded as an unsigned integer or a two’s complement signed integer. Overflow can occur
without warning.
When the instruction is LSLS or when LSL #n, with non-zero n, is used in Operand2 with the
instructions MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is
updated to the last bit shifted out, bit[32-n], of the register Rm. These instructions do not affect
the carry flag when used with LSL #0.
Figure 12-6. LSL #3
Rotate right by n bits moves the left-hand 32-n bits of the register Rm, to the right by n places,
into the right-hand 32-n bits of the result. And it moves the right-hand n bits of the register into
the left-hand n bits of the result. See
When the instruction is RORS or when ROR #n is used in Operand2 with the instructions MOVS,
MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to the last bit
rotation, bit[n-1], of the register Rm.
• If n is 33 or more and the carry flag is updated, it is updated to 0.
• If n is 32 or more, then all the bits in the result are cleared to 0.
• If n is 33 or more and the carry flag is updated, it is updated to 0.
• If n is 32, then the value of the result is same as the value in Rm, and if the carry flag is
• ROR with shift length, n, more than 32 is the same as ROR with shift length n-32.
updated, it is updated to bit[31] of Rm.
Carry
Figure 12-6 on page
Flag
31
0
0
31
0
98.
Figure
...
12-7.
...
5
4
5
3
4
3
2
11057B–ATARM–28-May-12
11057B–ATARM–28-May-12
2
0
1 0
n
0
1 0
, if the value is
0
Carry
Flag