ATSAM3X4EA-AU Atmel, ATSAM3X4EA-AU Datasheet - Page 99

• Manufacturer Part Number: ATSAM3X4EA-AU
• Description: ARM Microcontrollers - MCU QFP144,GREEN, IND TEMP, MRL A
• Manufacturer: Atmel

Specifications of ATSAM3X4EA-AU

• Rohs: yes
• Core: ARM Cortex M3
• Processor Series: SAM3X
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 84 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 3.6 V
• Operating Temperature Range: - 40 C to +85 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 60

12.11.4.5
12.11.5
12.11.6
11057B–ATARM–28-May-12
11057B–ATARM–28-May-12
Address alignment
PC-relative expressions
RRX
Figure 12-7. ROR #3
Rotate right with extend moves the bits of the register Rm to the right by one bit. And it copies
the carry flag into bit[31] of the result. See
When the instruction is RRXS or when RRX is used in Operand2 with the instructions MOVS,
MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to bit[0] of
the register Rm.
Figure 12-8. RRX
An aligned access is an operation where a word-aligned address is used for a word, dual word,
or multiple word access, or where a halfword-aligned address is used for a halfword access.
Byte accesses are always aligned.
The Cortex-M3 processor supports unaligned access only for the following instructions:
All other load and store instructions generate a usage fault exception if they perform an
unaligned access, and therefore their accesses must be address aligned. For more information
about usage faults see
Unaligned accesses are usually slower than aligned accesses. In addition, some memory
regions might not support unaligned accesses. Therefore, ARM recommends that programmers
ensure that accesses are aligned. To avoid accidental generation of unaligned accesses, use
the UNALIGN_TRP bit in the Configuration and Control Register to trap all unaligned accesses,
see
A PC-relative expression or label is a symbol that represents the address of an instruction or lit-
eral data. It is represented in the instruction as the PC value plus or minus a numeric offset. The
• LDR, LDRT
• LDRH, LDRHT
• LDRSH, LDRSHT
• STR, STRT
• STRH, STRHT
“Configuration and Control Register” on page
31
31 30
...
“Fault handling” on page
...
Figure 12-8 on page
87.
179.
99.
5
4
3
...
2
1 0
1 0
SAM3X/A
SAM3X/A
Carry
Carry
Flag
Flag
99
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