LPC1317FHN33,551 NXP Semiconductors, LPC1317FHN33,551 Datasheet - Page 56

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LPC1317FHN33,551

Manufacturer Part Number
LPC1317FHN33,551
Description
ARM Microcontrollers - MCU 32bit ARM Cortex-M3 64KB Flash 10KB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1317FHN33,551

Rohs
yes
Core
ARM Cortex M3
Processor Series
LPC1317
Data Bus Width
32 bit
Maximum Clock Frequency
72 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
2 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1317FHN33,551
Manufacturer:
NXP
Quantity:
201
Part Number:
LPC1317FHN33,551
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
Table 16.
[1]
[2]
[3]
[4]
LPC1315_16_17_45_46_47
Product data sheet
Symbol
SSP master
T
t
t
t
t
SSP slave
T
t
t
t
t
DS
DH
v(Q)
h(Q)
DS
DH
v(Q)
h(Q)
cy(clk)
cy(PCLK)
T
main clock frequency f
register), and the SSP CPSDVSR parameter (specified in the SSP clock prescale register).
T
T
T
cy(clk)
amb
cy(clk)
amb
= 40 C to 85 C.
= 25 C; V
= (SSPCLKDIV  (1 + SCR)  CPSDVSR) / f
= 12  T
Dynamic characteristics: SSP pins in SPI mode
Parameter
clock cycle time
data set-up time
data hold time
data output valid time
data output hold time
PCLK cycle time
data set-up time
data hold time
data output valid time
data output hold time
10.6 SSP interface
cy(PCLK)
DD
= 3.3 V.
main
.
, the SSP peripheral clock divider (SSPCLKDIV), the SSP SCR parameter (specified in the SSP0CR0
Conditions
full-duplex mode
when only transmitting
in SPI mode;
in SPI mode
in SPI mode
in SPI mode
in SPI mode
in SPI mode
in SPI mode
in SPI mode
2.4 V  V
2.0 V  V
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 September 2012
main
DD
DD
. The clock cycle time derived from the SPI bit rate T
 3.6 V
< 2.4 V
[1]
[1]
[2]
[2]
[2]
[2]
[2]
[3][4]
[3][4]
[3][4]
[3][4]
LPC1315/16/17/45/46/47
Min
40
27.8
15
20
0
-
0
13.9
0
3  T
-
-
cy(PCLK)
32-bit ARM Cortex-M3 microcontroller
+ 4
Max
-
-
-
-
-
10
-
-
-
-
3  T
2  T
cy(PCLK)
cy(PCLK)
cy(clk)
© NXP B.V. 2012. All rights reserved.
is a function of the
+ 11
+ 5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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