LPC1111FHN33/102'5 NXP Semiconductors, LPC1111FHN33/102'5 Datasheet - Page 396

• Manufacturer Part Number: LPC1111FHN33/102'5
• Description: ARM Microcontrollers - MCU CORTEX-M0 8 KB FL 4 KB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1111FHN33/102'5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1111
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Mounting Style: SMD/SMT
• Interface Type: I2C, SPI, UART
• Number Of Programmable I/os: 42
• Number Of Timers: 4
• Program Memory Type: Flash
• Factory Pack Quantity: 4000

24.1 How to read this chapter
24.2 Basic configuration
24.3 Features
24.4 General description
UM10398
User manual
The system tick timer (SysTick timer) is part of the ARM Cortex-M0 core and is identical
for all LPC111x, LPC11D14, and LPC11Cxx parts.
The system tick timer is configured using the following registers:
The block diagram of the SysTick timer is shown below in the
The SysTick timer is an integral part of the Cortex-M0. The SysTick timer is intended to
generate a fixed 10 millisecond interrupt for use by an operating system or other system
management software.
1. Pins: The system tick timer uses no external pins.
2. Power: The system tick timer is enabled through the SysTick control register
3. Enable the clock source for the SysTick timer in the SYST_CSR register
Fig 89. System tick timer block diagram
•
•
•
UM10398
Chapter 24: LPC111x/LPC11Cxx System tick timer (SysTick)
Rev. 12 — 24 September 2012
(Section
system clock.
Simple 24-bit timer.
Uses dedicated exception vector.
Clocked internally by the system clock or the system clock/2.
28.6.4.1). The system tick timer clock is fixed to half the frequency of the
All information provided in this document is subject to legal disclaimers.
= system clock/2
reference clock
system clock
Rev. 12 — 24 September 2012
bit CLKSOURCE
SYST_CSR
1
0
COUNTFLAG
clock
24-bit down counter
load
SYST_CALIB
SYST_RVR
SYST_CVR
SYST_CSR
load data
under -
flow
TICKINT
enable
count
ENABLE
Figure
System Tick
interrupt
peripheral
private
bus
89.
© NXP B.V. 2012. All rights reserved.
User manual
(Table
396 of 538
357).