PCI-MT32-XP-N1 Lattice, PCI-MT32-XP-N1 Datasheet - Page 183

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PCI-MT32-XP-N1

Manufacturer Part Number
PCI-MT32-XP-N1
Description
FPGA - Field Programmable Gate Array PCI Master/Target 32B
Manufacturer
Lattice
Datasheet

Specifications of PCI-MT32-XP-N1

Factory Pack Quantity
1
Lattice Semiconductor
IPUG18_09.2, November 2010
Table B-13. PCI Pin Assignments (Continued)
PCI Pin Assignments for Target 33 MHz 64-bit Bus
The PCI Target 33 MHz 64-bit core is optimized for LFSC3GA25E-5F900C. An example pin assignment, optimized
for best performance, is given in
information.
Table B-14. PCI Pin Assignments
PCI Interface Controls
PCI Interrupts
PCI System Pins
PCI Address and Data
Table
Signal Name
Signal Name
devseln
framen
cben[3]
ad[10]
ad[11]
ad[12]
ad[13]
ad[14]
ad[15]
ad[16]
ad[17]
ad[18]
ad[19]
stopn
perrn
serrn
irdyn
trdyn
intan
ad[0]
ad[1]
ad[2]
ad[3]
ad[4]
ad[5]
ad[6]
ad[7]
ad[8]
ad[9]
idsel
rstn
par
clk
B-14. Refer to the readme file included with the core package for further
Pin/Bank
Pin/Bank
AE13/5
AE12/5
AF10/5
AE11/5
AE10/5
AG14/5
AG13/5
AJ11/5
AE14/5
AH13/5
AH14/5
AF15/5
AJ12/5
AH1/5
AK5/5
AK4/5
AH8/5
AH7/5
AK3/5
AH3/5
AG8/5
AJ8/5
AJ7/5
AJ6/5
AJ5/5
AJ4/5
AF9/5
AJ3/5
AF8/5
AK7/5
AK6/5
AK8/5
AK9/5
183
Pin Assignments For Lattice FPGAs
PCI33_OUT
PCI33_OUT
PCI33_OUT
PCI33_OUT
PCI33_OUT
PCI33_OUT
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_IN
PCI33_IN
PCI33_IN
PCI33_IN
PCI33_IN
PCI33_IN
I/O Type
I/O Type
PCI IP Core User’s Guide

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