PCI-MT32-XP-N1 Lattice, PCI-MT32-XP-N1 Datasheet - Page 189

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PCI-MT32-XP-N1

Manufacturer Part Number
PCI-MT32-XP-N1
Description
FPGA - Field Programmable Gate Array PCI Master/Target 32B
Manufacturer
Lattice
Datasheet

Specifications of PCI-MT32-XP-N1

Factory Pack Quantity
1
Lattice Semiconductor
IPUG18_09.2, November 2010
Table B-16. PCI Pin Assignments (Continued)
PCI Pin Assignments for Target 66 MHz 32-bit Bus
The PCI Target 66 MHz 32-bit core is optimized for LFSC3GA25E-5F900C. An example pin assignment, optimized
for best performance, is given in
information.
Table B-17. PCI Pin Assignments
PCI Interrupts
PCI Bus Arbitration
PCI System Pins
PCI Address and Data
Table
Signal Name
Signal Name
devseln
ack64n
req64n
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perrn
serrn
intan
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idsel
gntn
reqn
rstn
clk
B-17. Refer to the readme file included with the core package for further
Pin/Bank
Pin/Bank
AG13/5
AH14/5
AH15/5
AE13/5
AE12/5
AF10/5
AE11/5
AE10/5
AJ12/5
AJ11/5
AH1/5
AK8/5
AK9/5
AK5/5
AK4/5
AH8/5
AH7/5
AK3/5
AH3/5
AG8/5
AG5/5
AH4/5
K11/5
AF4/5
AF9/5
AF8/5
AJ1/5
AJ8/5
AJ7/5
AJ6/5
AJ5/5
AJ4/5
AJ3/5
189
Pin Assignments For Lattice FPGAs
PCI33_OUT
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_IN
PCI33_IN
PCI33_IN
PCI33_IN
PCI33_IN
I/O Type
I/O Type
PCI IP Core User’s Guide

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