C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 125

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C8051F987-GMR

Manufacturer Part Number
C8051F987-GMR
Description
8-bit Microcontrollers - MCU 8kB 512B RAM
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F987-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
SFR Definition 9.3. SP: Stack Pointer
SFR Page = All; SFR Address = 0x81
SFR Definition 9.4. ACC: Accumulator
SFR Page = All; SFR Address = 0xE0; Bit-Addressable
SFR Definition 9.5. B: B Register
SFR Page = All; SFR Address = 0xF0; Bit-Addressable
Name
Reset
Name
Reset
Name
Reset
Bit
7:0
Bit
7:0
Bit
7:0
Type
Type
Type
Bit
Bit
Bit
ACC[7:0]
SP[7:0]
Name
Name
Name
B[7:0]
7
0
7
0
7
0
Stack Pointer.
The Stack Pointer holds the location of the top of the stack. The stack pointer is incre-
mented before every PUSH operation. The SP register defaults to 0x07 after reset.
Accumulator.
This register is the accumulator for arithmetic operations.
B Register.
This register serves as a second accumulator for certain arithmetic operations.
6
0
6
0
6
0
5
0
5
0
5
0
Rev. 1.1
4
0
4
0
4
0
ACC[7:0]
SP[7:0]
B[7:0]
R/W
R/W
R/W
C8051F99x-C8051F98x
Function
Function
Function
3
0
3
0
3
0
2
1
2
0
2
0
1
1
1
0
1
0
0
1
0
0
0
0
125

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