C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 155

• Manufacturer Part Number: C8051F987-GMR
• Description: 8-bit Microcontrollers - MCU 8kB 512B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F987-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

14.5. Flash Write and Erase Guidelines
Any system which contains routines which write or erase Flash memory from software involves some risk
that the write or erase routines will execute unintentionally if the CPU is operating outside its specified
operating range of V
fying code can result in alteration of Flash memory contents causing a system failure that is only recover-
able by re-Flashing the code in the device.
To help prevent the accidental modification of Flash by firmware, the V
enabled as a reset source on C8051F99x-C8051F98x devices for the Flash to be successfully modified. If
either the V
will be generated when the firmware attempts to modify the Flash.
The following guidelines are recommended for any system that contains routines which write or erase
Flash from code.
14.5.1. V
1. If the system power supply is subject to voltage or current "spikes," add sufficient transient protection
2. Make certain that the minimum V
3. Keep the on-chip V
Notes:
4. As an added precaution, explicitly enable the V
5. Make certain that all writes to the RSTSRC (Reset Sources) register use direct assignment operators
6. Make certain that all writes to the RSTSRC register explicitly set the PORSF bit to a 1. Areas to check
devices to the power supply to ensure that the supply voltages listed in the Absolute Maximum Ratings
table are not exceeded.
this rise time specification, then add an external V
holds the device in reset until V
V
as possible. This should be the first set of instructions executed after the Reset Vector. For C-based
systems, this will involve modifying the startup code added by the C compiler. See your compiler
documentation for more details. Make certain that there are no delays in software between enabling the
V
found in “AN201: Writing to Flash from Firmware," available from the Silicon Laboratories website.
1. On C8051F99x-C8051F98x devices, both the V
2. On C8051F99x-C8051F98x devices, both the V
source inside the functions that write and erase Flash memory. The V
should be placed just after the instruction to set PSWE to a 1, but before the Flash write or erase
operation instruction.
and explicitly DO NOT use the bit-wise operators (such as AND or OR). For example, "RSTSRC =
0x02" is correct, but "RSTSRC |= 0x02" is incorrect.
are initialization code which enables other reset sources, such as the Missing Clock Detector or
Comparator, for example, and instructions which force a Software Reset. A global search on "RSTSRC"
can quickly verify this.
DD
DD
to write or erase Flash without generating a Flash Error Device Reset.
hardware after a power-on reset.
drops below the minimum device operating voltage.
Monitor and enabling the V
DD
DD
Maintenance and the V
Monitor or the V
DD
DD
, system clock frequency, or temperature. This accidental execution of Flash modi-
Monitor enabled and enable the V
DD
DD
DD
DD
Monitor reset source is not enabled, a Flash Error Device Reset
reaches the minimum device operating voltage and re-asserts RST if
Monitor as a reset source. Code examples showing this can be
rise time specification of 1 ms is met. If the system cannot meet
DD
Monitor
Rev. 1.1
DD
DD
DD
Monitor and the V
Monitor and the V
DD
Monitor and enable the V
brownout circuit to the RST pin of the device that
C8051F99x-C8051F98x
DD
Monitor as a reset source as early in code
DD
DD
Monitor reset source must be enabled
Monitor reset source are enabled by
DD
DD
Monitor must be enabled and
Monitor enable instructions
DD
Monitor as a reset
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