C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 25

• Manufacturer Part Number: C8051F987-GMR
• Description: 8-bit Microcontrollers - MCU 8kB 512B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F987-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

1.1.
1.1.1. Fully 8051 Compatible
The C8051F99x-C8051F98x family utilizes Silicon Labs' proprietary CIP-51 microcontroller core. The CIP-
51 is fully compatible with the MCS-51™ instruction set; standard 803x/805x assemblers and compilers
can be used to develop software. The CIP-51 core offers all the peripherals included with a standard 8052.
1.1.2. Improved Throughput
The CIP-51 employs a pipelined architecture that greatly increases its instruction throughput over the
standard 8051 architecture. In a standard 8051, all instructions except for MUL and DIV take 12 or 24
system clock cycles to execute with a maximum system clock of 12-to-24 MHz. By contrast, the CIP-51
core executes 70% of its instructions in one or two system clock cycles, with only four instructions taking
more than four system clock cycles.
The CIP-51 has a total of 109 instructions. The table below shows the total number of instructions that
require each execution time.
With the CIP-51's maximum system clock at 25 MHz, it has a peak throughput of 25 MIPS.
1.1.3. Additional Features
The C8051F99x-C8051F98x SoC family includes several key enhancements to the CIP-51 core and
peripherals to improve performance and ease of use in end applications.
The extended interrupt handler provides multiple interrupt sources into the CIP-51 allowing numerous
analog and digital peripherals to interrupt the controller. An interrupt driven system requires less
intervention by the MCU, giving it more effective throughput. The extra interrupt sources are very useful
when building multi-tasking, real-time systems.
Eight reset sources are available: power-on reset circuitry (POR), an on-chip V
when power supply voltage drops below safe levels), a Watchdog Timer, a Missing Clock Detector,
SmaRTClock oscillator fail or alarm, a voltage level detection from Comparator0, a forced software reset,
an external reset pin, and an illegal Flash access protection circuit. Each reset source except for the POR,
Reset Input Pin, or Flash error may be disabled by the user in software. The WDT may be permanently
disabled in software after a power-on reset during MCU initialization.
The internal oscillator factory calibrated to 24.5 MHz and is accurate to ±2% over the full temperature and
supply range. The internal oscillator period can also be adjusted by user firmware. An additional 20 MHz
low power oscillator is also available which facilitates low-power operation. An external oscillator drive
circuit is included, allowing an external crystal, ceramic resonator, capacitor, RC, or CMOS clock source to
generate the system clock. If desired, the system clock source may be switched on-the-fly between both
internal and external oscillator circuits. An external oscillator can also be extremely useful in low power
applications, allowing the MCU to run from a slow (power saving) source, while periodically switching to
the fast (up to 25 MHz) internal oscillator as needed.
Number of Instructions
Clocks to Execute
CIP-51™ Microcontroller Core
26
1
50
2
2/3
Rev. 1.1
5
C8051F99x-C8051F98x
14
3
3/4
7
4
3
DD
4/5
1
monitor (forces reset
5
2
8
1
25