C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 168

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C8051F987-GMR

Manufacturer Part Number
C8051F987-GMR
Description
8-bit Microcontrollers - MCU 8kB 512B RAM
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F987-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
C8051F99x-C8051F98x
SFR Definition 15.3. PMU0MD: Power Management Unit Mode
SFR Page = 0xF; SFR Address = 0xCE
168
Name RTCOE
Reset
Bit
4:0
Type
7
6
5
Bit
WAKEOE
MONDIS
RTCOE
Unused
Name
R/W
7
0
WAKEOE
Buffered SmaRTClock Output Enable.
Enables the buffered SmaRTClock oscillator output on P0.2.
0: Buffered SmaRTClock output not enabled.
1: Buffered SmaRTClock output not enabled.
Wakeup Request Output Enable.
Enables the Sleep Mode wake-up request signal on P0.3.
0: Wake-up request signal is not enabled.
1: Wake-up request signal is enabled.
POR Supply Monitor Disable.
Writing a 1 to this bit disables the POR supply monitor.
Read = 00000b. Write = Don’t Care.
R/W
6
0
MONDIS
R/W
5
0
R/W
Rev. 1.1
4
0
Function
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0

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