C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 317

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C8051F987-GMR

Manufacturer Part Number
C8051F987-GMR
Description
8-bit Microcontrollers - MCU 8kB 512B RAM
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F987-GMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
27. C2 Interface
C8051F99x-C8051F98x devices include an on-chip Silicon Labs 2-Wire (C2) debug interface to allow
Flash programming and in-system debugging with the production part installed in the end application. The
C2 interface uses a clock signal (C2CK) and a bi-directional C2 data signal (C2D) to transfer information
between the device and a host system. See the C2 Interface Specification for details on the C2 protocol.
27.1. C2 Interface Registers
The following describes the C2 registers necessary to perform Flash programming through the C2 inter-
face. All C2 registers are accessed through the C2 interface as described in the C2 Interface Specification.
C2 Register Definition 27.1. C2ADD: C2 Address
Name
Reset
Bit
7:0 C2ADD[7:0] C2 Address.
Type
Bit
Name
7
0
The C2ADD register is accessed via the C2 interface to select the target Data register
for C2 Data Read and Data Write commands.
Address
0x00
0x01
0x02
0xB4
6
0
5
0
Description
Selects the Device ID register for Data Read instructions
Selects the Revision ID register for Data Read instructions
Selects the C2 Flash Programming Control register for Data
Read/Write instructions
Selects the C2 Flash Programming Data register for Data
Read/Write instructions
Rev. 1.1
4
0
C2ADD[7:0]
R/W
C8051F99x-C8051F98x
Function
3
0
2
0
1
0
0
0
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