MCIMX508CZK8B Freescale Semiconductor, MCIMX508CZK8B Datasheet - Page 11

• Manufacturer Part Number: MCIMX508CZK8B
• Description: Processors - Application Specialized CODEX REV 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX508CZK8B

• Core: ARM Cortex A8
• Processor Series: i.MX50

3
The i.MX50 processor contains a variety of digital and analog modules that are described in
alphabetical order.
Freescale Semiconductor
Mnemonic
Cortex-A8
AUDMUX
CAMP-1
eLCDIF
EPDC
Block
ePXP
ARM
Modules List
ARM Cortex-A8
Platform
Electrophoretic
Display
Controller
enhanced PiXel
Processing
Pipeline
enhanced LCD
Interface
Digital Audio
Mux
Clock Amplifier Clocks,
The numbers in brackets indicate the number of module instances. For
example, PWM (2) indicates two separate PWM peripherals.
Block Name
i.MX50 Applications Processors for Consumer Products, Rev. 4
ARM
Display
Peripherals
Display
Peripherals
Display
Peripherals
Slave
Connectivity
Peripherals
Resets, and
Power Control
Subsystem
Table 4. i.MX50 Digital and Analog Modules
The ARM Cortex-A8 Core Platform consists of the ARM Cortex-A8 processor
and its essential sub-blocks. It contains the 32 Kbyte L1 instruction cache,
32 Kbyte L1 data cache, Level 2 cache controller and a 256 Kbyte L2 cache.
The platform also contains an event monitor and debug modules. It also has
a NEON co-processor with SIMD media processing architecture, register file
with 32 × 64-bit general-purpose registers, an Integer execute pipeline (ALU,
Shift, MAC), dual, single-precision floating point execute pipeline (FADD,
FMUL), load/store and permute pipeline, and a non-pipelined vector floating
point (VFP Lite) co-processor supporting VFPv3.
The EPDC is a feature-rich, low power, and high-performance direct-drive
active matrix EPD controller. It is specifically designed to drive E-INK
panels supporting a wide variety of TFT backplanes.
A high-performance pixel processor capable of 1 pixel/clock performance for
combined operations such as color-space conversion, alpha blending,
gamma-mapping, and rotation. The ePXP is enhanced with features
specifically for grayscale applications. In addition, the ePXP supports
traditional pixel/frame processing paths for still-image and video processing
applications allowing it to interface with the integrated LCD controller
(eLCDIF).
The eLCDIF is a high-performance LCD controller interface supporting a rich
set of modes allowing inter operability with a wide variety of LCD panels,
including DOTCK/RGB and smart panels. The module also supports a
synchronous operation with the ePXP to allow the processed frames to be
passed from the ePXP to the eLCDIF through an on-chip SRAM buffer. The
eLCDIF can support up to 32-bit interfaces.
The AUDMUX is a programmable interconnect for voice, audio, and
synchronous data routing between host serial interfaces (for example, SSI1
and SSI2) and peripheral serial interfaces (audio and voice codecs). The
AUDMUX has six ports (two internal and four external) with identical
functionality and programming models. A desired connectivity is achieved by
configuring two or more AUDMUX ports.
Clock Amplifier
NOTE
Brief Description
Table 4
Modules List
TM
EPD
in
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