MCIMX508CZK8B Freescale Semiconductor, MCIMX508CZK8B Datasheet - Page 47

• Manufacturer Part Number: MCIMX508CZK8B
• Description: Processors - Application Specialized CODEX REV 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX508CZK8B

• Core: ARM Cortex A8
• Processor Series: i.MX50

4.6
This section contains the timing and electrical parameters for the modules in the i.MX50 processor.
4.6.1
Figure 6
4.6.2
Figure 7
Freescale Semiconductor
CC1
ID
shows the reset timing and
shows the WDOG reset timing and
Single output slew rate
(Driver impedance =40Ω+/-30%)
Single output slew rate
(Driver impedance =60Ω+/-30%
System Modules Timing
Duration of RESET_IN_B assertion to be qualified as valid (input slope =
5 ns)
Reset Timings Parameters
WDOG Reset Timing Parameters
1
“true” input signal and Vcp is the “complementary” input signal. The Minimum value is equal to
Vih(ac)-Vil(ac).
2
variation of OVDD. Vix(ac) indicates the voltage at which differential input signal must cross.
Vid(ac) specifies the input differential voltage |Vtr-Vcp| required for switching, where Vtr is the
The typical value of Vix(ac) is expected to be about 0.5*OVDD. and Vix(ac) is expected to track
WDOG_RST_B
RESET_IN_B
(Input)
(Input)
Parameter
i.MX50 Applications Processors for Consumer Products, Rev. 4
Table 34. LPDDR2 I/O AC Parameters (continued)
Figure 7. WDOG_RST_B Timing Diagram
Table 35. Reset Timing Parameters
Table 35
Parameter
Figure 6. Reset Timing Diagram
Table 36
lists the timing parameters.
Symbol
tsr
tsr
lists the timing parameters.
CC1
CC5
Min
1.5
1
Min
50
Max
3.5
2.5
Electrical Characteristics
Max
Unit
V/ns
V/ns
—
Unit
ns
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