MCIMX508CZK8B Freescale Semiconductor, MCIMX508CZK8B Datasheet - Page 49

• Manufacturer Part Number: MCIMX508CZK8B
• Description: Processors - Application Specialized CODEX REV 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX508CZK8B

• Core: ARM Cortex A8
• Processor Series: i.MX50

1
2
3
4
5
4.6.5
The i.MX50 GPMI controller is a flexible interface NAND Flash controller with 8-bit data width, up to
200 MB/s I/O speed and individual chip select.
It supports Asynchronous timing mode, Source Synchronous timing mode and Samsung Toggle timing
mode separately described in the following paragraphs.
4.6.5.1
Asynchronous mode AC timings are provided as multiplications of the clock cycle and fixed delay. The
Maximum I/O speed of GPMI in Asynchronous mode is about 50 MB/s.
and
Freescale Semiconductor
Frequency lock time
(FOL mode or non-integer MF)
Phase lock time
Frequency jitter
Phase jitter (peak value)
Power dissipation
Device input range cannot exceed the electrical specifications of the CAMP, see
The values specified here are internal to DPLL. Inside the DPLL, a 1 is added to the value specified by the user. Therefore, the
user has to enter a value 1 less than the desired value at the inputs of DPLL for PDF and MFD.
The maximum total multiplication factor (MFI + MFN/MFD) allowed is 15. Therefore, if the MFI value is 15, MFN value must be
zero.
T
mode is 398 cycles of divided reference clock when DPLL starts after full reset.
T
dpdref
dck
Figure 11
is the time period of the output clock, dpdck_2.
is the time period of the reference clock after predivider. According to the specification, the maximum lock time in FOL
General Purpose Media Interface (GPMI) Parameters
Parameter
5
Asynchronous Mode AC Timing (ONFI 1.0 Compatible)
depict the relative timing between GPMI signals at the module level for different
(peak value)
4
i.MX50 Applications Processors for Consumer Products, Rev. 4
Table 38. DPLL Electrical Parameters (continued)
FPL mode, integer and fractional MF
f
dvdd = 1.2 V
f
dvdd = 1.2 V
dck
dck
= 300 MHz @ avdd = 1.8 V,
= 650 MHz @ avdd = 1.8 V,
Test Conditions/Remarks
—
—
—
Table
Min
—
—
—
—
—
Figure
37.
0.02
Typ
8,
2.0
—
—
—
Electrical Characteristics
Figure
0.65 (avdd)
0.92 (dvdd)
1.98 (avdd)
1.8 (dvdd)
Max
0.04
398
100
3.5
9,
Figure 10
T
Unit
T
mW
dpdref
ns
µ
dck
s
49