MCIMX508CZK8B Freescale Semiconductor, MCIMX508CZK8B Datasheet - Page 72

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MCIMX508CZK8B

Manufacturer Part Number
MCIMX508CZK8B
Description
Processors - Application Specialized CODEX REV 1.1
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX508CZK8B

Core
ARM Cortex A8
Processor Series
i.MX50

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Electrical Characteristics
4.9
The following sections provide information on external peripheral interfaces.
4.9.1
The AUDMUX provides programmable interconnect logic for voice, audio and data routing between
internal serial interfaces (SSIs) and external serial interfaces (audio and voice codecs). The AC timing of
AUDMUX external pins is hence governed by the SSI module.
4.9.2
This section describes the timing parameters of the CSPI and eCSPI modules. The CSPI and eCSPI have
separate timing parameters for master and slave modes. The nomenclature used with the CSPI/eCSPI
modules and the respective routing of these signals is shown in
72
eCSPI1
eCSPI2
CSPI
DDR21
DDR22
ID
External Peripheral Interfaces
AUDMUX Timing Parameters
CSPI and eCSPI Timing Parameters
DQS to DQ input skew
DQS to DQ input hold time
Module
The timing parameter DDR20(tDQSCK) is not strictly required by this
DRAM MC design.
i.MX50 Applications Processors for Consumer Products, Rev. 4
GPIO, KPP, DISP0_DAT, CSI0_DAT, and EIM_D through IOMUX
DISP0_DAT, CSI0_DAT, and EIM through IOMUX
DISP0_DAT, EIM_A/D, SD1, and SD2 through IOMUX
Description
Table 48. CSPI Nomenclature and Routing
Table 47. DDR2 Input AC Timing
NOTE
I/O Access
Table
Symbol
tDQSQ
tQH
48.
0.45 tCK
-0.85
Min
Freescale Semiconductor
Max
0.65
Unit
ns
ns

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