MCIMX508CZK8B Freescale Semiconductor, MCIMX508CZK8B Datasheet - Page 94

• Manufacturer Part Number: MCIMX508CZK8B
• Description: Processors - Application Specialized CODEX REV 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX508CZK8B

• Core: ARM Cortex A8
• Processor Series: i.MX50

Electrical Characteristics
94
SS39
SS44
SS45
SS46
ID
(Tx) CK high to STXD high impedance
SRXD setup before (Tx) CK falling
SRXD hold after (Tx) CK falling
SRXD rise/fall time
•
•
•
•
•
All the timings for the SSI are given for a non-inverted serial clock
polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have
been inverted, all the timing remains valid by inverting the clock signal
STCK/SRCK and/or the frame sync STFS/SRFS shown in both the
tables and figures.
All timings are on Audiomux Pads when SSI is being used for data
transfer.
Tx and Rx refer to the transmit and receive sections of the SSI.
The terms WL and BL refer to word length (WL) and bit length (BL).
For internal frame sync operation using external clock, the FS timing is
same as that of Tx Data (for example, during AC97 mode of operation).
Table 67. SSI Transmitter Timing with External Clock (continued)
i.MX50 Applications Processors for Consumer Products, Rev. 4
Parameter
Synchronous External Clock Operation
NOTE
10.0
Min
2.0
—
—
Freescale Semiconductor
Max
15.0
6.0
—
—
Unit
ns
ns
ns
ns