AT89LP51ED2-20MU Atmel, AT89LP51ED2-20MU Datasheet - Page 172

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AT89LP51ED2-20MU

Manufacturer Part Number
AT89LP51ED2-20MU
Description
8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
Manufacturer
Atmel
Datasheet

Specifications of AT89LP51ED2-20MU

Rohs
yes
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
64 KB
Data Ram Size
256 B
On-chip Adc
Yes
Operating Supply Voltage
2.4 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
VQFN-44
Mounting Style
SMD/SMT
Data Rom Size
4 KB
Interface Type
2-Wire, SPI, UART
Number Of Programmable I/os
36
Number Of Timers
3
Processor Series
AT89x
Program Memory Type
Flash
Factory Pack Quantity
360
21.7
Table 21-2.
Note:
Table 21-3.
172
Symbol
ADIF
GO/BSY
DAC
ADCE
LADJ
ACK
DADC = A4H
Not Bit Addressable
Bit
2-0
DADI = A5H
Not Bit Addressable
Bit
Registers
1. f
AT89LP51RD2/ED2/ID2 Preliminary
OSC
Function
ADC Interrupt Flag
Set by hardware when a conversion completes. Cleared by hardware when calling the interrupt service routine.
Conversion Start/Busy Flag
In software triggered mode, writing a 1 to this bit starts a conversion. The bit remains high while the conversion is in
progress and is cleared by hardware when the conversion completes. In hardware triggered mode, this bit is set and
cleared by hardware to flag when the DADC is busy.
Digital-to-Analog Conversion Enable
Set to configure the DADC in Digital-to-Analog (DAC) mode. Clear to configure the DADC in Analog-to-Digital (ADC)
mode.
DADC Enable
Set to enable the DADC. Clear to disable the DADC.
Left Adjust Enable
When cleared, the ADC results are right adjusted and the MSBs are sign extended. When set, the ADC results are left
adjusted and the LSBs are zeroed.
DADC Clock Select
ACK3
0
0
0
0
1
1
1
1
DADC
DADI
ACON
is the frequency of the system clock oscillator source before the X1/X2 and CKRL dividers.
ADIF
7
7
– DADC Input Control Register
– DADC Control Register
ACK1
0
0
1
1
0
0
1
1
GO/BSY
IREF
6
6
ACK0
0
1
0
1
0
1
0
1
TRG1
DAC
5
Clock Source
Internal RC Oscillator/4 (2MHz)
f
f
f
f
f
f
f
5
OSC
OSC
OSC
OSC
OSC
OSC
OSC
/2
/4
/8
/16
/32
/64
/128
ADCE
TRG0
(1)
4
4
LADJ
DIFF
3
3
ACK2
ACS2
2
2
Reset Value = 0000 0000B
Reset Value = 0000 0000B
ACK1
ACS1
1
1
ACK0
ACS0
3714A–MICRO–7/11
0
0

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