AT89LP51ED2-20MU Atmel, AT89LP51ED2-20MU Datasheet - Page 4

• Manufacturer Part Number: AT89LP51ED2-20MU
• Description: 8-bit Microcontrollers - MCU 64KB 20MHz 2.4V-5.5V
• Manufacturer: Atmel

Specifications of AT89LP51ED2-20MU

• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: VQFN-44
• Mounting Style: SMD/SMT
• Data Rom Size: 4 KB
• Interface Type: 2-Wire, SPI, UART
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Processor Series: AT89x
• Program Memory Type: Flash
• Factory Pack Quantity: 360

1.5
Table 1-1.
4
VQFN
VQFP
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
Pin Number
Pin Description
PLCC
AT89LP51RD2/ED2/ID2 Preliminary
10
11
12
13
14
15
16
17
18
19
20
21
7
8
9
Atmel AT89LP51RD2/ED2/ID2 Pin Description
PDIP
10
11
12
13
14
15
16
17
18
19
(1)
6
7
8
9
Symbol
P1.5
P1.6
P1.7
RST
P3.0
P4.1
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P4.7
P4.6
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
I
I
I
I
I
Description
P1.5: User-configurable I/O Port 1 bit 5.
MISO: SPI master-in/slave-out. When configured as master, this pin is an input. When
configured as slave, this pin is an output.
MOSI: SPI master-out/slave-in (Remap mode). When configured as master, this pin is an output.
When configured as slave, this pin is an input. During In-System Programming, this pin is an
input.
CEX2: Capture/Compare external I/O for PCA module 2.
P1.6: User-configurable I/O Port 1 bit 6.
SCK: SPI Clock. When configured as master, this pin is an output. When configured as slave,
this pin is an input.
MISO: SPI master-in/slave-out (Remap mode). When configured as master, this pin is an input.
When configured as slave, this pin is an output. During In-System Programming, this pin is an
output.
CEX3: Capture/Compare external I/O for PCA module 3.
P1.7: User-configurable I/O Port 1 bit 7.
MOSI: SPI master-out/slave-in. When configured as master, this pin is an output. When
configured as slave, this pin is an input.
SCK: SPI Clock (Remap mode). When configured as master, this pin is an output. When
configured as slave, this pin is an input. During In-System Programming, this pin is an input.
CEX4: Capture/Compare external I/O for PCA module 4.
RST: External Reset input (Reset polarity depends on POL pin.
55.). The RST pin can output a pulse when the internal Watchdog reset or POR is active.
DCL: Serial Debug Clock input for On-Chip Debug Interface when OCD is enabled.
P3.0: User-configurable I/O Port 3 bit 0.
RXD: Serial Port Receiver Input.
P4.1: User-configurable I/O Port 4bit 1.
SDA: TWI bidirectional Serial Data line.
P3.1: User-configurable I/O Port 3 bit 1.
TXD: Serial Port Transmitter Output.
P3.2: User-configurable I/O Port 3 bit 2.
INT0: External Interrupt 0 Input or Timer 0 Gate Input.
P3.3: User-configurable I/O Port 3 bit 3.
INT1: External Interrupt 1 Input or Timer 1 Gate Input
P3.4: User-configurable I/O Port 3 bit 4.
T1: Timer/Counter 0 External input or output.
P3.5: User-configurable I/O Port 3 bit 5.
T1: Timer/Counter 1 External input or output.
P3.6: User-configurable I/O Port 3 bit 6.
WR: External memory interface Write Strobe (active-low).
P3.7: User-configurable I/O Port 3 bit 7.
RD: External memory interface Read Strobe (active-low).
P4.7: User-configurable I/O Port 4 bit 7.
XTAL2A: Output from inverting oscillator amplifier A. It may be used as a port pin if the internal
RC oscillator or external clock is selected as the clock source A.
P4.6: User-configurable I/O Port 4 bit 6.
XTAL1A: Input to the inverting oscillator amplifier A and internal clock generation circuits. It may
be used as a port pin if the internal RC oscillator is selected as the clock source A.
See “External Reset” on page
3714A–MICRO–7/11