MA330028 Microchip Technology, MA330028 Datasheet - Page 240

• Manufacturer Part Number: MA330028
• Description: Daughter Cards & OEM Boards dsPIC33EP64MC504 PIM
• Manufacturer: Microchip Technology

Specifications of MA330028

• Rohs: yes
• Product: Daughter Cards
• Core: dsPIC
• Description/function: Plug-in-module with dsPIC33EP64MC504 device for use with DM330021 and DM330023 motor control development board
• Interface Type: CAN, I2C, SPI
• Operating Supply Voltage: 3 to 3.6 V
• Tool Is For Evaluation Of: dsPIC33EP64MC504
• For Use With: DM330021, DM330023

REGISTER 16-13: IOCONx: PWM I/O CONTROL REGISTER
DS70657E-page 240
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-10
bit 9
bit 8
bit 7-6
bit 5-4
bit 3-2
Note 1:
R/W-0
R/W-0
PENH
2:
OVRDAT<1:0>
These bits should not be changed after the PWM module is enabled (PTEN = 1).
If the PWMLOCK Configuration bit (FOSCSEL<6>) is a ‘1’, the IOCONx register can only be written after
the unlock sequence has been executed.
PENH: PWMxH Output Pin Ownership bit
1 = PWM module controls PWMxH pin
0 = GPIO module controls PWMxH pin
PENL: PWMxL Output Pin Ownership bit
1 = PWM module controls PWMxL pin
0 = GPIO module controls PWMxL pin
POLH: PWMxH Output Pin Polarity bit
1 = PWMxH pin is active-low
0 = PWMxH pin is active-high
POLL: PWMxL Output Pin Polarity bit
1 = PWMxL pin is active-low
0 = PWMxL pin is active-high
PMOD<1:0>: PWM # I/O Pin Mode bits
11 = Reserved; do not use
10 = PWM I/O pin pair is in the Push-Pull Output mode
01 = PWM I/O pin pair is in the Redundant Output mode
00 = PWM I/O pin pair is in the Complementary Output mode
OVRENH: Override Enable for PWMxH Pin bit
1 = OVRDAT<1> controls output on PWMxH pin
0 = PWM generator controls PWMxH pin
OVRENL: Override Enable for PWMxL Pin bit
1 = OVRDAT<0> controls output on PWMxL pin
0 = PWM generator controls PWMxL pin
OVRDAT<1:0>: Data for PWMxH, PWMxL Pins if Override is Enabled bits
If OVERENH = 1, PWMxH is driven to the state specified by OVRDAT<1>.
If OVERENL = 1, PWMxL is driven to the state specified by OVRDAT<0>.
FLTDAT<1:0>: Data for PWMxH and PWMxL Pins if FLTMOD is Enabled bits
If Fault is active, PWMxH is driven to the state specified by FLTDAT<1>.
If Fault is active, PWMxL is driven to the state specified by FLTDAT<0>.
CLDAT<1:0>: Data for PWMxH and PWMxL Pins if CLMOD is Enabled bits
If current-limit is active, PWMxH is driven to the state specified by CLDAT<1>.
If current-limit is active, PWMxL is driven to the state specified by CLDAT<0>.
R/W-0
R/W-0
PENL
W = Writable bit
‘1’ = Bit is set
R/W-0
POLH
R/W-0
FLTDAT<1:0>
R/W-0
R/W-0
POLL
Preliminary
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
PMOD<1:0>
CLDAT<1:0>
(2)
R/W-0
R/W-0
(1)
© 2011-2012 Microchip Technology Inc.
x = Bit is unknown
OVRENH
SWAP
R/W-0
R/W-0
OVRENL
OSYNC
R/W-0
R/W-0
bit 8
bit 0