MA330028 Microchip Technology, MA330028 Datasheet - Page 384

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MA330028

Manufacturer Part Number
MA330028
Description
Daughter Cards & OEM Boards dsPIC33EP64MC504 PIM
Manufacturer
Microchip Technology
Datasheet

Specifications of MA330028

Rohs
yes
Product
Daughter Cards
Core
dsPIC
Description/function
Plug-in-module with dsPIC33EP64MC504 device for use with DM330021 and DM330023 motor control development board
Interface Type
CAN, I2C, SPI
Operating Supply Voltage
3 to 3.6 V
Tool Is For Evaluation Of
dsPIC33EP64MC504
For Use With
DM330021, DM330023

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MA330028
Manufacturer:
MICROCHIP
Quantity:
12 000
Most instructions are a single word. Certain double-
word instructions are designed to provide all the
required information in these 48 bits. In the second
word, the 8 MSbs are ‘0’s. If this second word is exe-
cuted as an instruction (by itself), it executes as a NOP.
The double-word instructions execute in two instruction
cycles.
Most single-word instructions are executed in a single
instruction cycle, unless a conditional test is true, or the
program counter is changed as a result of the
instruction, or a PSV or table read is performed. In these
cases, the execution takes multiple instruction cycles
TABLE 28-1:
DS70657E-page 384
#text
(text)
[text]
{ }
a ∈ {b, c, d}
<n:m>
.b
.d
.S
.w
Acc
AWB
bit4
C, DC, N, OV, Z
Expr
f
lit1
lit4
lit5
lit8
lit10
lit14
lit16
lit23
None
OA, OB, SA, SB
PC
Slit10
Slit16
Slit6
Wb
Wd
Wdo
Wm,Wn
Field
SYMBOLS USED IN OPCODE DESCRIPTIONS
Means literal defined by “text”
Means “content of text”
Means “the location addressed by text”
Optional field or operation
a is selected from the set of values b, c, d
Register bit field
Byte mode selection
Double-Word mode selection
Shadow register select
Word mode selection (default)
One of two accumulators {A, B}
Accumulator write back destination address register ∈ {W13, [W13]+ = 2}
4-bit bit selection field (used in word addressed instructions) ∈ {0...15}
MCU Status bits: Carry, Digit Carry, Negative, Overflow, Sticky Zero
Absolute address, label or expression (resolved by the linker)
File register address ∈ {0x0000...0x1FFF}
1-bit unsigned literal ∈ {0,1}
4-bit unsigned literal ∈ {0...15}
5-bit unsigned literal ∈ {0...31}
8-bit unsigned literal ∈ {0...255}
10-bit unsigned literal ∈ {0...255} for Byte mode, {0:1023} for Word mode
14-bit unsigned literal ∈ {0...16384}
16-bit unsigned literal ∈ {0...65535}
23-bit unsigned literal ∈ {0...8388608}; LSb must be ‘0’
Field does not require an entry, can be blank
DSP Status bits: ACCA Overflow, ACCB Overflow, ACCA Saturate, ACCB Saturate
Program Counter
10-bit signed literal ∈ {-512...511}
16-bit signed literal ∈ {-32768...32767}
6-bit signed literal ∈ {-16...16}
Base W register ∈ {W0...W15}
Destination W register ∈ { Wd, [Wd], [Wd++], [Wd--], [++Wd], [--Wd] }
Destination W register ∈
{ Wnd, [Wnd], [Wnd++], [Wnd--], [++Wnd], [--Wnd], [Wnd+Wb] }
Dividend, Divisor working register pair (direct addressing)
Preliminary
with the additional instruction cycle(s) executed as a
NOP. Certain instructions that involve skipping over the
subsequent instruction require either two or three cycles
if the skip is performed, depending on whether the
instruction being skipped is a single-word or two-word
instruction. Moreover, double-word moves require two
cycles.
Note:
Description
For more details on the instruction set,
refer to the “16-bit MCU and DSC
Programmer’s
(DS70157).
© 2011-2012 Microchip Technology Inc.
Reference
Manual”

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