MA330028 Microchip Technology, MA330028 Datasheet - Page 303

• Manufacturer Part Number: MA330028
• Description: Daughter Cards & OEM Boards dsPIC33EP64MC504 PIM
• Manufacturer: Microchip Technology

Specifications of MA330028

• Rohs: yes
• Product: Daughter Cards
• Core: dsPIC
• Description/function: Plug-in-module with dsPIC33EP64MC504 device for use with DM330021 and DM330023 motor control development board
• Interface Type: CAN, I2C, SPI
• Operating Supply Voltage: 3 to 3.6 V
• Tool Is For Evaluation Of: dsPIC33EP64MC504
• For Use With: DM330021, DM330023

REGISTER 21-17: CiRXFnEID: ECAN™ ACCEPTANCE FILTER EXTENDED IDENTIFIER REGISTER
REGISTER 21-18: CiFMSKSEL1: ECAN™ FILTER 7-0 MASK SELECTION REGISTER
© 2011-2012 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-12
bit 11-10
bit 9-8
bit 7-6
bit 5-4
bit 3-2
bit 1-0
R/W-x
EID15
R/W-x
R/W-0
R/W-0
EID7
F7MSK<1:0>
F3MSK<1:0>
EID<15:0>: Extended Identifier bits
1 = Message address bit EIDx must be ‘1’ to match filter
0 = Message address bit EIDx must be ‘0’ to match filter
F7MSK<1:0>: Mask Source for Filter 7 bit
11 = Reserved
10 = Acceptance Mask 2 registers contain mask
01 = Acceptance Mask 1 registers contain mask
00 = Acceptance Mask 0 registers contain mask
F6MSK<1:0>: Mask Source for Filter 6 bit (same values as bit 15-14)
F5MSK<1:0>: Mask Source for Filter 5 bit (same values as bit 15-14)
F4MSK<1:0>: Mask Source for Filter 4 bit (same values as bit 15-14)
F3MSK<1:0>: Mask Source for Filter 3 bit (same values as bit 15-14)
F2MSK<1:0>: Mask Source for Filter 2 bit (same values as bit 15-14)
F1MSK<1:0>: Mask Source for Filter 1 bit (same values as bit 15-14)
F0MSK<1:0>: Mask Source for Filter 0 bit (same values as bit 15-14)
R/W-x
EID14
R/W-x
R/W-0
R/W-0
EID6
n (n = 0-15)
C = Writable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
C = Writable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-x
EID13
R/W-x
EID5
F6MSK<1:0>
F2MSK<1:0>
R/W-x
EID12
R/W-x
R/W-0
R/W-0
EID4
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-x
EID11
R/W-x
EID3
F5MSK<1:0>
F1MSK<1:0>
R/W-x
EID10
R/W-x
R/W-0
R/W-0
EID2
x = Bit is unknown
x = Bit is unknown
R/W-x
R/W-x
R/W-0
R/W-0
EID9
EID1
F4MSK<1:0>
F0MSK<1:0>
DS70657E-page 303
R/W-0
R/W-0
R/W-x
R/W-x
EID8
EID0
bit 8
bit 0
bit 8
bit 0