MT46V64M16TG-6T IT:A TR Micron Technology Inc, MT46V64M16TG-6T IT:A TR Datasheet - Page 60

• Manufacturer Part Number: MT46V64M16TG-6T IT:A TR
• Description: IC DDR SDRAM 1GBIT 6NS 66TSOP
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V64M16TG-6T IT:A TR

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 1G (64M x 16)
• Speed: 6ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 66-TSOP
• Organization: 64Mx16
• Density: 1Gb
• Address Bus: 16b
• Access Time (max): 700ps
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Package Type: TSOP
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Supply Current: 275mA
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 32:
PDF: 09005aef80a2f898/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 1Gb DDR: Rev. I, Core DDR: Rev. B 12/07 EN
Command
BA0, BA1
Case 1:
Case 2:
Address
DQS
DQS
CK#
CKE
A10
DM
DQ
DQ
CK
t
t
AC (MIN) and
AC (MAX) and
Bank READ – Without Auto Precharge
Notes:
t
t
IS
NOP
IS
T0
t
1
t
IH
t
IH
DQSCK (MIN)
t
DQSCK (MAX)
1. NOP commands are shown for ease of illustration; other commands may be valid at these
2. BL = 4.
3. The PRECHARGE command can only be applied at T5 if
4. Disable auto precharge.
5. “Don’t Care” if A10 is HIGH at T5.
6. DO n (or b) = data-out from column n (or column b); subsequent elements are provided in
7. Refer to Figure 33 on page 61, Figure 34 on page 62, and Figure 35 on page 63 for detailed
times.
the programmed order.
DQS and DQ timing.
t
Bank x
t
IS
IS
Row
Row
ACT
T1
t
t
IH
IH
t
CK
t
t RAS 3
t
RCD
RC
NOP
T2
1
t
CH
t
CL
t
Bank x
READ
4
Col n
IS
T3
t
2
t
IH
LZ (MIN)
60
CL = 2
NOP
T4
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1
RPRE
t
LZ (MIN)
t
RPRE
One bank
All banks
Bank x
PRE
T5
t
3
DQSCK (MIN)
DO
t
DQSCK (MAX)
1Gb: x4, x8, x16 DDR SDRAM
n
5
t
AC (MIN)
DO
t
n
AC (MAX)
T5n
t
RAS (MIN) is met.
t
RP
NOP
T6
1
©2003 Micron Technology, Inc. All rights reserved.
Transitioning Data
t
HZ (MAX)
T6n
t
RPST
t
RPST
NOP
T7
1
Operations
Bank x
Don’t Care
Row
Row
ACT
T8