MT28F320J3RG-11 GMET Micron Technology Inc, MT28F320J3RG-11 GMET Datasheet - Page 48

• Manufacturer Part Number: MT28F320J3RG-11 GMET
• Description: IC FLASH 32MBIT 110NS 56TSOP
• Manufacturer: Micron Technology Inc

Specifications of MT28F320J3RG-11 GMET

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 32M (4Mx8, 2Mx16)
• Speed: 110ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 28: AC Characteristics – WRITE Operations
Notes: 1, 2, 3; extended temperature (-40ºC ≤ T
NOTE:
10. V
09005aef80b5a323
MT28F640J3.fm – Rev. N 3/05 EN
PARAMETER
RP# High Recovery to WE# (CEx) Going LOW
CEx (WE#) LOW to WE# (CEx) Going LOW
Write Pulse Width
Data Setup to WE# (CEx) Going HIGH
Address Setup to WE# (CEx) Going HIGH
CEx (WE#) Hold from WE# (CEx) HIGH
Data Hold from WE# (CEx) HIGH
Address Hold from WE# (CEx) HIGH
Write Pulse Width HIGH
V
Write Recovery Before Read
WE# (CEx) HIGH to STS Going LOW
V
WE# (CEx) HIGH to Status Register Busy
1. CEx LOW is defined as the first edge of CE0, CE1, or CE2 that enables the device. CEx HIGH is defined as the first
2. Read timing characteristics during BLOCK ERASE, PROGRAM, and LOCK BIT CONFIGURATION operations are the
3. A WRITE operation can be initiated and terminated with either CEX or WE#.
4. Sampled, not 100 percent tested.
5. Write pulse width (
6. Refer to Table 4 on page 14 for valid A
7. Write pulse width high (
8. For array access,
9. STS timings are based on STS configured in its RY/BY# default mode.
PEN
PEN
edge of CE0, CE1, or CE2 that disables the device.
same as during read-only operations. Refer to AC Characteristics – Read-Only Operations.
HIGH (whichever goes HIGH first).
going LOW (whichever goes LOW first).
(SR1/3/4/5 = 0).
PEN
Setup to WE# (CEx) Going HIGH
Hold from Valid SRD, STS Going HIGH
should be held at V
t
AA is required in addition to
t
WP) is defined from CEx or WE# going LOW (whichever goes LOW last) to CEx or WE# going
t
PENH
WPH) is defined from CEx or WE# going HIGH (whichever goes HIGH first) to CEx or WE#
until determination of block erase, program, or lock bit configuration success
IN
and D
A
≤ +85ºC)
t
t
IN
WR for any accesses after a WRITE.
WPH (
t
SYMBOL
t
t
CH (
WP (
CS (
for block erase, program, or lock bit configuration.
t
t
t
t
t
t
t
t
t
VPH
t
VPS
WR
WB
STS
DH
AH
DS
AS
RS
t
t
WS)
WH)
t
t
CP)
CPH)
48
32Mb, 64Mb, 128Mb
MIN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
70
50
55
30
35
1
0
0
0
0
0
0
128Mb, 64Mb, 32Mb
MAX
200
200
Q-FLASH MEMORY
UNITS
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
©2000 Micron Technology. Inc.
NOTES
4, 9, 10
4
5
5
6
6
7
4
8
9
4