FAN4810N Fairchild Semiconductor, FAN4810N Datasheet - Page 8

• Manufacturer Part Number: FAN4810N
• Description: IC PFC CTRLR AVERAGE CURR 16DIP
• Manufacturer: Fairchild Semiconductor

Specifications of FAN4810N

• Mode: Average Current
• Current - Startup: 200µA
• Voltage - Supply: 11 V ~ 16.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Switching Frequency: 81 KHz
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Frequency - Switching: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: FAN4810N_NL; FAN4810N_NL

FAN4810
Current Error Amplifier
The current error amplifier’s output controls the PFC duty
cycle to keep the average current through the boost inductor
a linear function of the line voltage. At the inverting input to
the current error amplifier, the output current of the gain
modulator is summed with a current which results from a
negative voltage being impressed upon the I
negative voltage on I
flowing in the PFC circuit, and is typically derived from a
current sense resistor in series with the negative terminal of
the input bridge rectifier. In higher power applications, two
current transformers are sometimes used, one to monitor the
ID of the boost MOSFET(s) and one to monitor the I
boost diode. As stated above, the inverting input of the
current error amplifier is a virtual ground. Given this fact,
and the arrangement of the duty cycle modulator polarities
internal to the PFC, an increase in positive current from the
gain modulator will cause the output stage to increase its
duty cycle until the voltage on I
to cancel this increased current. Similarly, if the gain
modulator’s output decreases, the output duty cycle will
decrease, to achieve a less negative voltage on the I
pin.
Cycle-By-Cycle Current Limiter
The I
back loop, is a direct input to the cycle-by-cycle current
limiter for the PFC section. Should the input voltage at this
pin ever be more negative than -1V, the output of the PFC
will be disabled until the protection flip-flop is reset by the
clock pulse at the start of the next PFC power cycle.
8
15
2
4
3
7
I AC
V FB
V RMS
I SENSE
RAMP 1
2.5V
SENSE
pin, as well as being a part of the current feed-
–
+
VEA
VEAO
MODULATOR
GAIN
16
SENSE
1.6k
represents the sum of all currents
SENSE
1.6k
+
–
IEA
is adequately negative
IEAO
SENSE
1
OSCILLATOR
Figure 1. PFC Block Diagram
+
–
0.5V
pin. The
SENSE
F
of the
+
–
TRI-FAULT
TriFault Detect
To improve power supply reliability, reduce system
component count, and simplify compliance to UL 1950
safety standards, the FAN4810 includes TriFault Detect.
This feature monitors VFB (Pin 15) for certain PFC fault
conditions.
In the case of a feedback path failure, the output of the PFC
could go out of safe operating limits. With such a failure,
VFB will go outside of its normal operating area. Should
VFB go too low, too high, or open, TriFault Detect senses the
error and terminates the PFC output drive.
TriFault detect is an entirely internal circuit. It requires no
external components to serve its protective function.
Overvoltage Protection
The OVP comparator serves to protect the power circuit
from being subjected to excessive voltages if the load should
suddenly change. A resistor divider from the high voltage
DC output of the PFC is fed to V
V
The OVP comparator has 250mV of hysteresis, and the PFC
will not restart until the voltage at V
The V
external power components and the FAN4810 are within
their safe operating voltages, but not so low as to interfere
with the boost voltage regulation loop.
FB
2.75V
exceeds 2.75V, the PFC output driver is shut down.
–1V
FB
should be set at a level where the active and passive
PFC I LIMIT
OVP
+
+
–
–
TM
FB
S
R
S
R
PRODUCT SPECIFICATION
. When the voltage on
FB
Q
Q
Q
Q
drops below 2.50V.
REV. 1.0.12 9/24/03
PFC OUT
12