NCP1603D100R2 ON Semiconductor, NCP1603D100R2 Datasheet - Page 19

• Manufacturer Part Number: NCP1603D100R2
• Description: IC CTRLR PFC/PWM HV START 16SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1603D100R2

• Mode: Critical Conduction (CRM), Discontinuous Conduction (DCM)
• Frequency - Switching: 58kHz
• Current - Startup: 17µA
• Voltage - Supply: 9 V ~ 18 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Switching Frequency: 405 KHz
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: NCP1603D100R2OSTR

Frequency Jittering
signature by spreading the energy in the vicinity of the main
switching component. The PWM Section offers a typical
±6.4% deviation on the nominal switching frequency
(100 kHz typical). A sweep sawtooth modulates the
100 kHz clock up and down with a 5.0 ms period.
Figure 51 illustrates the ±6.4% variation of the jittering
oscillator frequency versus time.
FB2
Frequency jittering is a method used to soften the EMI
Figure 51. Frequency Jittering of PWM Oscillator
2
Vdd
V
PWM Section Oscillator Frequency
20 k
55 k
25 k
FB2
V
Soft−Start
1 V Max
V
SS
FB2
3
5 ms
+
-
Figure 52. Block Diagram and Timing Diagram of Fault Detection
Soft−Start Period 2.5 ms
125 ms
Delay
1 V
Start Vaux
Enable Vaux/PFC
time
106.4 kHz
100 kHz
93.6 kHz
&
Fault
Disable
Vaux/PFC
and Out2
http://onsemi.com
19
Fault Condition
timing diagram. When fault (or output short circuit)
happens, the output voltage collapses and the optocoupler
is opened. V
(3.8 V typical). Then, the controller activates an error flag
when (V
that is 1.0 V after the 2.5 ms from startup.
output voltage is not yet established and FB2 pin (Pin 2) is
opened. Therefore, there is a 125 ms timer to allow the
circuit to establish an initial output voltage. Then, a fault
(or short circuit) condition is recognized when an error flag
(V
detected, Out2 (Pin 13) goes low. The power supply stops
delivering power to the output. On the other hand, the V
(= V
when the error flag disappears.
rid of the auxiliary winding information that cannot truely
represent the output voltage when the flyback transformer
is badly coupled.
Figure 52 illustrates the fault detection circuitry and its
When the circuit is powering up in the beginning, the
This fault detection method offers advantage of getting
1 V
FB2
V
within regulation window
(V
(i.e., normal operation)
aux
CC1
FB2
starts when V
q 3.0 V) can last for 125 ms. When a fault is
< 3 V).
) also goes low. The V
FB2
V
V
V
FB2
aux
FB2
/3) is greater than the soft−start voltage V
SS
/3
is internally pulled to be higher than 3.0 V
FB2
is
125ms
aux
V
regulation window (V
for more than 125 ms.
(i.e., fault condition)
aux
will restore immediately
stops when V
FB2
FB2
is out of
> 3 V)
time
time
aux
SS