XCCACE128-I Xilinx Inc, XCCACE128-I Datasheet - Page 58

• Manufacturer Part Number: XCCACE128-I
• Description: IC 128MBIT ACE FLASH CARD
• Manufacturer: Xilinx Inc

Specifications of XCCACE128-I

• Memory Size: 128Mb
• Memory Type: FLASH
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

System ACE CompactFlash Solution
CompactFlash Interface Timing Characteristics
Table 30: CompactFlash Interface Timing Characteristics
Configuration JTAG Interface Timing Characteristics
Table 31: Configuration JTAG Interface Timing Characteristics
58
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
S(CFCDCLK)
S(CFDCLK)
S(CFWAITCLK)
H(CLKCFCD)
H(CLKCFD)
H(CLKCFWAIT)
D(CLKCFA)
D(CLKCFCE)
D(CLKCFD)
D(CLKCFOE)
D(CLKCFWE)
S(CFGADDRCLK)
S(CFGINITCLK)
S(CFGMODEPINCLK)
S(CFGTDICLK)
H(CLKCFGADDR)
H(CLKCFGINIT)
H(CLKCFGMODEPIN)
H(CLKCFGTDI)
D(CLKCFGTDO)
D(CLKCFGTMS)
D(CLKCFGTCK)
Symbol
Symbol
CFCD1 and CFCD2 setup time before rising edge of CLK
CFD[15:0] setup time before rising edge of CLK
CFWAIT setup time before rising edge of CLK
CFCD1 and CFCD2 hold time after rising edge of CLK
CFD[15:0] hold time after rising edge of CLK
CFWAIT hold time after rising edge of CLK
CLK rising edge to CFA[10:0]
CLK rising edge to CFCE1 and CFCE2
CLK rising edge to CFD[15:0]
CLK rising edge to CFOE
CLK rising edge to CFWE
CFGADDR[2:0] setup time before rising edge of CLK
CFGINIT setup time before rising edge of CLK
CFGMODEPIN setup time before rising edge of CLK
CFGTDI setup time before falling edge of CLK
CFGADDR[2:0] hold time after rising edge of CLK
CFGINIT hold time after rising edge of CLK
CFGMODEPIN hold time after rising edge of CLK
CFGTDI hold time after falling edge of CLK
CLK falling edge to CFGTDO
CLK falling edge to CFGTMS
Propagation delay from CLK to CFGTCK
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Parameter
Parameter
Min
Min
DS080 (v2.0) October 1, 2008
11
5
0
5
4
4
4
5
4
6
7
4
5
4
Product Specification
Max
Max
19
16
19
16
16
16
20
15
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R