CDB42528 Cirrus Logic Inc, CDB42528 Datasheet - Page 63

• Manufacturer Part Number: CDB42528
• Description: BOARD EVAL FOR CS42528/CS49300
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42528

• Main Purpose: Audio, Audio Processing
• Embedded: Yes, DSP
• Utilized Ic / Part: CS49300, CS42528
• Primary Attributes: 8 Single-Ended Analog Inputs and Outputs, 4 S/PDIF Inputs and 2 S/PDIF Outputs
• Secondary Attributes: Parallel, RS422, RS232, UDSP Interfaces
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1503

8.3.1. Design Considerations when
The designer should be aware that the gfabt codes
do not lock the PLL, so therefore the actual time
involved with autobooting is subject to the open
loop VCO frequency. The PLL is only locked when
the command is sent from the host, typically along
with the kickstart command. Also, the designer
should take into account the access time of the
Flash Memory, EPROM, and latches used in their
specific design. While there is a temptation to use
the gfabt4 code which would theoretically minimize
the Autoboot time, the designer should realize that
this may result in the DSP to attempting to
Autoboot too quickly, resulting in clocking times
that exceed that of the specified access times of
particular external memory devices or the
associated latches.
The designer should note that the times listed in
Table 11 were taken from 3 sample CS493264-CL
Rev. G devices and are in no way a guarantee of
the times that your design will achieve as all values
are dependent on the open loop frequency of the
DSP. Furthermore the times listed in Table 11 DO
NOT include the code initialization time (the time
spent after download while the code prepares for
messages). Therefore, the times listed above
should be used as the upper bound on boot time
when using the gfabt codes.
8.4. Internal Boot
Certain applications are stored in the ROM of the
CS493253,
CS493264. To enable these applications a special
loader called an internal boot assist program must
be used. This internal boot assist (or IBA) code can
be downloaded using either host boot or autoboot
methods. After the IBA program has been
downloaded, it enables the internally stored
application code. The IBA codes are typically
around 350 bytes in size and hence can easily be
stored in a host controller.
8.5. Application Failure Boot Message
Each piece of application code is specifically
tailored for an individual part in the CS493XX
family. Although it is possible to load a piece of
DS339F7
using GFABT Codes
CS493254,
CS493263
and
code into the wrong chip and receive a
BOOT_SUCCESS byte, the code will not initialize
itself. In order to facilitate the debug of designs
which can accept many members of the CS493XX
family, an APPLICATION_FAILURE message is
provided.
As mentioned earlier, the host must wait for at least
5ms after download before sending configuration
messages to the CS493XX. This provides time for
the code to initialize itself. If the INTREQ pin is low
after the download process has completed, the
host should read from the CS493XX. The byte
0xF0 indicates APPLICATION_FAILURE. This
byte informs the host that the application code was
loaded into an incompatible DSP.
Although most of the messages listed in Tables 9
and 10 are essentially ignored for autoboot, it
should be noted that the APPLICATION_FAILURE
message is applicable whether host boot or
autoboot is used.
8.6. Resetting the CS493XX
Resetting the CS493XX uses a combination of
software and hardware. To reset the device, a
previous application must have been downloaded.
The flow diagram in
Reset" on page 64
performing a reset.
The following is a detailed description of a reset
sequence to the CS493XX. All writes and reads
with the CS493XX should follow the protocol given
in
1) Reset begins when the host issues a hard reset
2) The host should then send the message
3) After waiting 5 ms to allow the downloaded
Section 6, “Control” on page
and holds the mode pins appropriately (WR,
RD, and PSEL) as described in
“Control” on page
communication
whichever communication mode is chosen by
the host.
SOFT_RESET (0x000001). This will reset the
previously downloaded application with all of
the hardware configurations in their default
states. The application code user’s guide for
each application lists those parameters which
are affected by a SOFT_RESET.
CS49300 Family DSP
protocol
shows the procedure for
36. It is assumed that the
Figure 39, "Performing a
36.
is
followed
Section 6,
for
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