STEVAL-ISQ002V1 STMicroelectronics, STEVAL-ISQ002V1 Datasheet - Page 153
STEVAL-ISQ002V1
Manufacturer Part Number
STEVAL-ISQ002V1
Description
BOARD EVAL BASED ON ST72264G1
Manufacturer
STMicroelectronics
Specifications of STEVAL-ISQ002V1
Main Purpose
Interface, PMBus
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ST72F264
Primary Attributes
The PMBus™ Interface Using the ST7 I2C Peripheral
Secondary Attributes
Firmware in C Language
Product
Power Management Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6423
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Part Number
Manufacturer
Quantity
Price
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Part Number:
STEVAL-ISQ002V1
Manufacturer:
STMicroelectronics
Quantity:
1
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13.11 COMMUNICATION INTERFACE CHARACTERISTICS
13.11.1 SPI - Serial Peripheral Interface
Subject to general operating conditions for V
f
Figure 93. SPI Slave Timing Diagram with CPHA=0
Notes:
1. Data based on design simulation and/or characterisation results, not tested in production.
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave mode) has
its alternate function capability released. In this case, the pin status depends on the I/O port configuration.
3. Measurement points are done at CMOS levels: 0.3xV
OSC
Symbol
1/t
t
t
w(SCKH)
w(SCKL)
t
t
t
t
t
t
t
t
dis(SO)
t
t
t
t
r(SCK)
su(SS)
f(SCK)
t
su(MI)
t
v(MO)
h(MO)
f
su(SI)
a(SO)
v(SO)
h(SO)
MISO
MOSI
h(SS)
h(MI)
c(SCK)
h(SI)
, and T
SCK
SS
CPHA=0
CPOL=0
CPHA=0
CPOL=1
OUTPUT
INPUT
INPUT
A
SPI clock frequency
SPI clock rise and fall time
SS setup time
SS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access time
Data output disable time
Data output valid time
Data output hold time
Data output valid time
Data output hold time
unless otherwise specified.
see note 2
t
a(SO)
t
su(SS)
t
su(SI)
Parameter
t
t
MSB IN
w(SCKH)
w(SCKL)
MSB OUT
t
t
h(SI)
c(SCK)
t
DD
v(SO)
DD
Slave
,
Master
Slave
Slave
Slave
Master
Slave
Master
Slave
Master
Slave
Slave
Slave (after enable edge)
Master (before capture edge)
BIT6 OUT
and 0.7xV
Refer to I/O port characteristics for more details on
the input/output alternate function characteristics
(SS, SCK, MOSI, MISO).
3)
Conditions
ST72260Gx, ST72262Gx, ST72264Gx
DD
BIT1 IN
.
t
f
f
h(SO)
CPU
CPU
=8MHz
=8MHz
t
t
r(SCK)
f(SCK)
f
CPU
LSB IN
0.0625
see I/O port pin description
0.25
0.25
Min
120
120
100
100
100
100
100
90
LSB OUT
0
0
0
/128
t
h(SS)
f
f
CPU
CPU
Max
120
240
120
2
4
/4
/2
t
dis(SO)
153/172
Unit
t
MHz
CPU
ns
note 2
see
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