EVB9221-MINI SMSC, EVB9221-MINI Datasheet - Page 64

• Manufacturer Part Number: EVB9221-MINI
• Description: EVALUATION BOARD LAN9221-ABZJ
• Manufacturer: SMSC

Specifications of EVB9221-MINI

• Main Purpose: Interface, Ethernet Controller (PHY and MAC)
• Embedded: No
• Utilized Ic / Part: LAN9221
• Primary Attributes: 1 Port, 100BASE-TX/10BASE-T
• Secondary Attributes: 16-Bit, HP Auto-MDIX, Full and Half Duplex Support, 32-Bit CRC
• Processor To Be Evaluated: LAN9221
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 638-1074

Revision 2.7 (03-15-10)
3.13.1.1
3.13.1.2
Receive Data FIFO Fast Forward
The RX data path implements an automatic data discard function. Using the RX data FIFO Fast
Forward bit (RX_FFWD) in the RX_DP_CTRL register, the host can instruct the LAN9221/LAN9221i
to skip the packet at the head of the RX data FIFO. The RX data FIFO pointers are automatically
incremented to the beginning of the next RX packet.
When performing a fast-forward, there must be at least 4 DWORDs of data in the RX data FIFO for
the packet being discarded. For less than 4 DWORDs do not use RX_FFWD. In this case data must
be read from the RX data FIFO and discarded using standard PIO read operations.
After initiating a fast-forward operation, do not perform any reads of the RX data FIFO until the
RX_FFWD bit is cleared. Other resources can be accessed during this time (i.e., any registers and/or
the other three FIFOs). Also note that the RX_FFWD will only fast-forward the RX data FIFO, not the
RX status FIFO.
The receiver does not have to be stopped to perform a fast-forward operation.
Force Receiver Discard (Receiver Dump)
In addition to the Receive data Fast Forward feature, LAN9221/LAN9221i also implements a receiver
"dump" feature. This feature allows the host processor to flush the entire contents of the RX data and
RX status FIFOs. When activated, the read and write pointers for the RX data and status FIFOs will
be returned to their reset state. To perform a receiver dump, the LAN9221/LAN9221i receiver must be
halted. Once the receiver stop completion is confirmed, the RX_DUMP bit can be set in the RX_CFG
register. The RX_DUMP bit is cleared when the dump is complete. For more information on stopping
the receiver, please refer to
information on the RX_DUMP bit, please refer to
Register," on page
87.
Section 3.13.4, "Stopping and Starting the Receiver," on page
DATASHEET
64
High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Section 5.3.7, "RX_CFG—Receive Configuration
SMSC LAN9221/LAN9221i
67. For more
Datasheet