EVAL-ADUC831QSZ Analog Devices Inc, EVAL-ADUC831QSZ Datasheet - Page 49

• Manufacturer Part Number: EVAL-ADUC831QSZ
• Description: KIT DEV FOR ADUC831 QUICK START
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC831QSZ

• Contents: Evaluation Board, Power Supply, Cable, Software and Documentation
• Silicon Manufacturer: Analog Devices
• Core Architecture: 8051
• Silicon Core Number: ADuC831
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: ADUC8xx
• Development Tool Type: Hardware - Eval/Demo Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC831
• Lead Free Status / Rohs Status: Compliant
• Other names: EVAL-ADUC831QS; EVAL-ADUC831QS

MISO is shared with P3.3 and as such has the same configuration
as shown in Figure 40.
*These instructions read the port byte (all 8 bits), modify the addressed bit, and
REV. 0
then write the new byte back to the latch.
Figure 43. SDATA/MOSI Pin I/O Functional Equivalent
in SPI Mode
Figure 44. SDATA/MOSI Pin I/O Functional Equivalent
in I
BITS
SFR
SPE = 0 (I
2
MDO
MDE
I2CM
Figure 42. SCLOCK Pin I/O Functional Equivalent
in I
MDI
C Mode
(MASTER/SLAVE)
HARDWARE SPI
HARDWARE I
(SLAVE ONLY)
SPE = 0 (I
HARDWARE I
2
(SLAVE ONLY)
I2CM
C Mode
BITS
MCO
SFR
2
C ENABLE)
SPE = 1 (SPI ENABLE)
2
C ENABLE)
REJECTION FILTER
2
REJECTION FILTER
C
2
C
50ns GLITCH
50ns GLITCH
Q1
Q3
DV
DV
DD
Q1
(OFF)
Q3
DD
Q2 (OFF)
Q4 (OFF)
Q2
Q4
DV
Q1
(OFF)
Q3
SCLOCK
DD
PIN
SDATA/
Q2
Q4
MOSI
PIN
SDATA/
MOSI
PIN
–49–
Read-Modify-Write Instructions
Some 8051 instructions that read a port read the latch, and
others read the pin. The instructions that read the latch rather
than the pins are the ones that read a value, possibly change it,
and then rewrite it to the latch. These are called “read-modify-
write” instructions. Listed below are the read-modify-write
instructions. When the destination operand is a port, or a port
bit, these instructions read the latch rather than the pin.
The reason that read-modify-write instructions are directed to the
latch rather than the pin is to avoid a possible misinterpretation of
the voltage level of a pin. For example, a port pin might be used to
drive the base of a transistor. When a 1 is written to the bit, the
transistor is turned on. If the CPU then reads the same port bit at
the pin rather than the latch, it will read the base voltage of the
transistor and interpret it as a logic 0. Reading the latch rather than
the pin will return the correct value of 1.
ANL
ORL
XRL
JBC
CPL
INC
DEC
DJNZ
MOV PX.Y, C* (Move Carry to Bit Y of Port X)
CLR PX.Y*
SETB PX.Y*
(Logical AND, e.g., ANL P1, A)
(Logical OR, e.g., ORL P2, A)
(Logical EX-OR, e.g., XRL P3, A)
(Jump if Bit = 1 and Clear Bit, e.g., JBC P1.1,
LABEL)
(Complement Bit, e.g., CPL P3.0)
(Increment, e.g., INC P2)
(Decrement, e.g., DEC P2)
(Decrement and Jump if Not Zero, e.g.,
DJNZ P3, LABEL)
(Clear Bit Y of Port X)
(Set Bit Y of Port X)
ADuC831