EVAL-ADUC831QSZ Analog Devices Inc, EVAL-ADUC831QSZ Datasheet - Page 59

KIT DEV FOR ADUC831 QUICK START

EVAL-ADUC831QSZ

Manufacturer Part Number
EVAL-ADUC831QSZ
Description
KIT DEV FOR ADUC831 QUICK START
Manufacturer
Analog Devices Inc
Series
QuickStart™ Kitr
Type
MCUr
Datasheet

Specifications of EVAL-ADUC831QSZ

Contents
Evaluation Board, Power Supply, Cable, Software and Documentation
Silicon Manufacturer
Analog Devices
Core Architecture
8051
Silicon Core Number
ADuC831
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Mcu Supported Families
ADUC8xx
Development Tool Type
Hardware - Eval/Demo Board
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ADuC831
Lead Free Status / Rohs Status
Compliant
Other names
EVAL-ADUC831QS
EVAL-ADUC831QS
INTERRUPT SYSTEM
The ADuC831 provides a total of nine interrupt sources with
two priority levels. The control and configuration of the interrupt
system is carried out through three Interrupt-related SFRs.
IE
IP
IEIP2
IE
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
IP
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
IEIP2
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
REV. 0
Name
EA
EADC
ET2
ES
ET1
EX1
ET0
EX0
Name
----
PADC
PT2
PS
PT1
PX1
PT0
PX0
Name
----
PTI
PPSM
PSI
----
ETI
EPSMI
ESI
Interrupt Enable Register
Interrupt Priority Register
Secondary Interrupt Enable Register
Secondary Interrupt Enable Register
A9H
A0H
No
Interrupt Enable Register
Description
Written by User to Enable “1” or Disable “0” All Interrupt Sources
Written by User to Enable “1” or Disable “0” ADC Interrupt
Written by User to Enable “1” or Disable “0” Timer 2 Interrupt
Written by User to Enable “1” or Disable “0” UART Serial Port Interrupt
Written by User to Enable “1” or Disable “0” Timer 1 Interrupt
Written by User to Enable “1” or Disable “0” External Interrupt 1
Written by User to Enable “1” or Disable “0” Timer 0 Interrupt
Written by User to Enable “1” or Disable “0” External Interrupt 0
Interrupt Priority Register
Description
Reserved for Future Use
Written by User to Select ADC Interrupt Priority (“1” = High; “0” = Low)
Written by User to Select Timer 2 Interrupt Priority (“1” = High; “0” = Low)
Written by User to Select UART Serial Port Interrupt Priority (“1” = High; “0” = Low)
Written by User to Select Timer 1 Interrupt Priority (“1” = High; “0” = Low)
Written by User to Select External Interrupt 1 Priority (“1” = High; “0” = Low)
Written by User to Select Timer 0 Interrupt Priority (“1” = High; “0” = Low)
Written by User to Select External Interrupt 0 Priority (“1” = High; “0” = Low)
Description
Reserved for Future Use
Priority for Time Interval Interrupt
Priority for Power Supply Monitor Interrupt
Priority for SPI/I
This Bit Must Contain Zero
Written by User to Enable “1” or Disable “0” Time Interval Counter Interrupt
Written by User to Enable “1” or Disable “0” Power Supply Monitor Interrupt
Written by User to Enable “1” or Disable “0” SPI/I
A8H
00H
Yes
B8H
00H
Yes
Table XXX. IEIP2 SFR Bit Designations
Table XXVIII. IE SFR Bit Designations
Table XXIX. IP SFR Bit Designations
2
C Interrupt
–59–
2
C Serial Port Interrupt
ADuC831

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