M68EVB908GB60E Freescale Semiconductor, M68EVB908GB60E Datasheet - Page 169

• Manufacturer Part Number: M68EVB908GB60E
• Description: BOARD EVAL FOR MC9S08GB60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of M68EVB908GB60E

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC9S08GB
• Data Bus Width: 8 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08GB
• Kit Contents: GB60 Evaluation Kit
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.2
Features of SCI module include:
11.3
The SCI allows full-duplex, asynchronous, NRZ serial communication among the MCU and remote
devices, including other MCUs. The SCI comprises a baud rate generator, transmitter, and receiver block.
The transmitter and receiver operate independently, although they use the same baud rate generator. During
normal operation, the MCU monitors the status of the SCI, writes the data to be transmitted, and processes
received data. The following describes each of the blocks of the SCI.
11.4
As shown in
SCI communications require the transmitter and receiver (which typically derive baud rates from
independent clock sources) to use the same baud rate. Allowed tolerance on this baud frequency depends
on the details of how the receiver synchronizes to the leading edge of the start bit and how bit sampling is
performed.
Freescale Semiconductor
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Full-duplex, standard non-return-to-zero (NRZ) format
Double-buffered transmitter and receiver with separate enables
Programmable baud rates (13-bit modulo divider)
Interrupt-driven or polled operation:
— Transmit data register empty and transmission complete
— Receive data register full
— Receive overrun, parity error, framing error, and noise error
— Idle receiver detect
Hardware parity generation and checking
Programmable 8-bit or 9-bit character length
Receiver wakeup by idle-line or address-mark
Features
SCI System Description
Baud Rate Generation
Figure
11-2, the clock source for the SCI baud rate generator is the bus-rate clock.
BUSCLK
Figure 11-2. SCI Baud Rate Generation
BAUD RATE =
BAUD RATE GENERATOR
OFF IF [SBR12:SBR0] = 0
MC9S08GB/GT Data Sheet, Rev. 2.3
MODULO DIVIDE BY
(1 THROUGH 8191)
SBR12:SBR0
[SBR12:SBR0] × 16
BUSCLK
DIVIDE BY
16
Rx SAMPLING CLOCK
(16 × BAUD RATE)
Tx BAUD RATE
Features
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