Z8F083A0128ZCOG Zilog, Z8F083A0128ZCOG Datasheet - Page 108

• Manufacturer Part Number: Z8F083A0128ZCOG
• Description: KIT DEVELOPMENT F083A
• Manufacturer: Zilog
• Series: Z8 Encore! XP®r
• Type: MCUr

Specifications of Z8F083A0128ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F083A
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4672

Table 60. ADC Control Register 0 (ADCCTL0)
BITS
FIELD
RESET
R/W
ADDR
PS026308-1207
ADC Control Register Definitions
ADC Interrupt
Reference Buffer
Internal Voltage Reference Generator
Calibration and Compensation
ADC Control Register 0
START
R/W1
7
0
The ADC generates an interrupt request when a conversion has been completed. An
interrupt request that is pending when the ADC is disabled is not cleared automatically.
The reference buffer, RBUF, supplies the reference voltage for the ADC. When enabled,
the internal voltage reference generator supplies the ADC. When RBUF is disabled, the
ADC must have the reference voltage supplied externally through the V
package. RBUF is controlled by the REFEN bit in the ADC control register.
The internal voltage reference generator provides the voltage VR2, for the RBUF. VR2 is
2 V.
You perform calibration and store the values into Flash, or the user code performs a
manual offset calibration. There is no provision for manual gain calibration.
The ADC control registers are defined in the following paragraphs.
The ADC control register 0 initiates the A/D conversion and provides ADC status
information. See
Reserved
R/W
6
0
Table
REFEN
R/W
60.
5
0
ADCEN
R/W
4
0
F70h
Reserved
R/W
3
0
R/W
Z8 Encore!
2
0
Product Specification
Analog-to-Digital Converter
ANAIN[2:0]
REF
R/W
1
0
®
pin in 28-pin
F083A Series
R/W
0
0
96