Z8F083A0128ZCOG Zilog, Z8F083A0128ZCOG Datasheet - Page 73

KIT DEVELOPMENT F083A

Z8F083A0128ZCOG

Manufacturer Part Number
Z8F083A0128ZCOG
Description
KIT DEVELOPMENT F083A
Manufacturer
Zilog
Series
Z8 Encore! XP®r
Type
MCUr
Datasheets

Specifications of Z8F083A0128ZCOG

Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F083A
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4672

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Quantity
Price
Part Number:
Z8F083A0128ZCOG
Manufacturer:
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Table 39. IRQ1 Enable High Bit Register (IRQ1ENH)
Table 40. IRQ1 Enable Low Bit Register (IRQ1ENL)
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS026308-1207
IRQ1 Enable High and Low Bit Registers
PA7ENH PA6CENH PA5ENH
PA7ENL
R/W
R/W
7
0
7
0
Table 38
registers
interrupt request 1 register. Priority is generated by setting bits in each register.
Table 38. IRQ1 Enable and Priority Encoding
PA7ENH—Port A Bit[7] interrupt request enable high bit
PA6CENH—Port A Bit[7] or comparator interrupt request enable high bit
PAxENH—Port A Bit[x] interrupt request enable high bit
Refer to the interrupt port select register for selection of either Port A or Port D as the
interrupt source.
where x indicates the register bits from 0–7.
IRQ1ENH[x] IRQ1ENL[x]
0
0
1
1
PA6CENL
(Table 39
describes the priority control for IRQ1. The IRQ1 enable high and low bit
R/W
R/W
6
0
6
0
and
PA5ENL
0
1
0
1
R/W
R/W
Table
5
0
5
0
40) form a priority encoded enabling for interrupts in the
Priority
Disabled
Level 1
Level 2
Level 3
PA4ENH
PA4ENL
R/W
R/W
4
0
4
0
FC4H
FC5H
PA3ENH
PA3ENL
R/W
R/W
Description
Disabled
Low
Nominal
High
3
0
3
0
PA2ENH
PA2ENL
R/W
R/W
Z8 Encore!
2
0
2
0
Product Specification
PA1ENH
PA1ENL
R/W
R/W
1
0
1
0
®
Interrupt Controller
F083A Series
PA0ENH
PA0ENL
R/W
R/W
0
0
0
0
61

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