Z8F083A0128ZCOG Zilog, Z8F083A0128ZCOG Datasheet - Page 31

• Manufacturer Part Number: Z8F083A0128ZCOG
• Description: KIT DEVELOPMENT F083A
• Manufacturer: Zilog
• Series: Z8 Encore! XP®r
• Type: MCUr

Specifications of Z8F083A0128ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F083A
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4672

Table 7. Register File Address Map
Address (Hex)
General Purpose RAM
000–0FF
100–EFF
Timer 0
F00
F01
F02
F03
F04
F05
F06
F07
Timer 1
F08
F09
F0A
F0B
F0C
F0D
F0E
F0F
F10–F6F
Analog-to-Digital Converter (ADC)
F70
F71
F72
F73
F74
XX=Undefined
Register Map
PS026308-1207
Table 7
devices. Consider registers for unimplemented peripherals as reserved.
Register Description
General purpose register file RAM
Reserved
Timer 0 high byte
Timer 0 low byte
Timer 0 reload high byte
Timer 0 reload low byte
Timer 0 PWM high byte
Timer 0 PWM low byte
Timer 0 control 0
Timer 0 control 1
Timer 1 high byte
Timer 1 low byte
Timer 1 reload high byte
Timer 1 reload low byte
Timer 1 PWM high byte
Timer 1 PWM low byte
Timer 1 control 0
Timer 1 control 1
Reserved
ADC control 0
Reserved
ADC data high byte
ADC data low bits
ADC sample settling time
provides the address map for the register file of the Z8 Encore! F083A Series
Mnemonic
—
—
T0H
T0L
T0RH
T0RL
T0PWMH
T0PWML
T0CTL0
T0CTL1
T1H
T1L
T1RH
T1RL
T1PWMH
T1PWML
T1CTL0
T1CTL1
—
ADCCTL0
—
ADCD_H
ADCD_L
ADCSST
Z8 Encore!
Reset (Hex)
XX
XX
00
01
FF
FF
00
00
00
00
00
01
FF
FF
00
00
00
00
XX
00
XX
XX
XX
0F
Product Specification
®
F083A Series
81
81
96
Page #
79
79
80
80
81
81
82
79
79
80
80
81
81
79
98
98
99
Register Map
19