Z8F083A0128ZCOG Zilog, Z8F083A0128ZCOG Datasheet - Page 56

• Manufacturer Part Number: Z8F083A0128ZCOG
• Description: KIT DEVELOPMENT F083A
• Manufacturer: Zilog
• Series: Z8 Encore! XP®r
• Type: MCUr

Specifications of Z8F083A0128ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F083A
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4672

Table 16. Port A–D GPIO Address Registers (PxADDR)
BITS
FIELD
RESET
R/W
ADDR
PS026308-1207
PADDR[7:0]
09H–FFH
00H
01H
02H
03H
04H
05H
06H
07H
08H
Port A–D Address Registers
Port A–D Control Registers
R/W
7
The Port A–D address registers select the GPIO port functionality accessible through the
Port A–D control registers. The Port A–D address and control registers combine to
provide access to all GPIO port controls (see
PADDR[7:0]—Port Address
The port address selects one of the subregisters accessible through the port control
register.
The Port A–D control registers set the GPIO port operation. The value in the
corresponding Port A–D address register determines, which subregister is read from or
written to by a Port A–D control register transaction. See
Port Control subregister accessible using the Port A–D Control Registers
No function. Provides some protection against accidental port reconfiguration.
Data direction
Alternate function
Output control (Open-Drain)
High drive enable
Stop Mode Recovery source enable.
Pull-up enable
Alternate function set 1
Alternate function set 2
No function
R/W
6
R/W
5
FD0H, FD4H, FD8H, FDCH
R/W
4
PADDR[7:0]
00H
Table
R/W
3
16).
Table 17
R/W
Z8 Encore!
2
General Purpose Input/Output
Product Specification
on page 45.
R/W
1
®
F083A Series
R/W
0
44