MPC8308-RDB Freescale Semiconductor, MPC8308-RDB Datasheet - Page 20

BOARD REF DESIGN MPC8308

MPC8308-RDB

Manufacturer Part Number
MPC8308-RDB
Description
BOARD REF DESIGN MPC8308
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MPUr

Specifications of MPC8308-RDB

Contents
Board, Cables, Documentation, Power Supply, Software
Ethernet Connection Type
Serial to Ethernet
Data Rate
10 Mbps, 100 Mbps, 1000 Mbps
Memory Type
DDR2, SDRAM
Interface Type
HSSI
Operating Voltage
1.5 V
Operating Current
5 uA
Maximum Power Dissipation
1000 mW
Operating Temperature Range
- 55 C to + 125 C
Product
Modules
For Use With/related Products
MPC8308
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Ethernet: Three-Speed Ethernet, MII Management
Figure 11
8.3
The electrical characteristics specified here apply to MII management interface signals MDIO
(management data input/output) and MDC (management data clock). The electrical characteristics for MII
20
At recommended operating conditions with LV
GTX_CLK125 reference clock period
GTX_CLK125 reference clock duty cycle
Notes:
1. Note that, in general, the clock reference symbol representation for this section is based on the symbols RGT to represent
2. This implies that PC board design requires clocks to be routed such that an additional trace delay of greater than 1.5 ns is
3. For 10 and 100 Mbps, t
4. Duty cycle may be stretched/shrunk during speed changes or while transitioning to a received packet's clock domains as long
5. Duty cycle reference is 0.5*LV
6. This symbol is used to represent the external GTX_CLK125 and does not follow the original symbol naming convention.
RGMII timing. For example, the subscript of t
(R) and fall (F) times follows the clock symbol that is being represented. For symbols representing skews, the subscript is
skew (SK) followed by the clock that is being skewed (RGT).
added to the associated clock signal.
as the minimum duty cycle is not violated and stretching occurs for no more than three t
between.
(At Transmitter)
Ethernet Management Interface Electrical Characteristics
shows the RGMII AC timing and multiplexing diagrams.
RXD[8:5][3:0]
RXD[7:4][3:0]
TXD[8:5][3:0]
TXD[7:4][3:0]
GTX_CLK
(At PHY)
(At PHY)
RX_CTL
RX_CLK
TX_CLK
TX_CTL
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
RGT
Figure 11. RGMII AC Timing and Multiplexing Diagrams
scales to 400 ns ± 40 ns and 40 ns ± 4 ns, respectively.
Table 25. RGMII AC Timing Specifications (continued)
DD
DD
RXD[3:0]
TXD[3:0]
RXD[4]
TXD[4]
of 2.5 V ± 5%.
TXEN
RXDV
RGT
represents the RGMII receive (RX) clock. Note also that the notation for rise
RXD[8:5]
RXD[7:4]
TXD[8:5]
TXD[7:4]
RXERR
TXERR
RXD[9]
TXD[9]
t
G125H
t
G12
/t
G125
6
t
t
SKRGT
SKRGT
t
RGTH
47
RGT
t
8.0
of the lowest speed transitioned
RGT
Freescale Semiconductor
t
t
SKRGT
SKRGT
53
ns
%

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