MPC8308-RDB Freescale Semiconductor, MPC8308-RDB Datasheet - Page 33

BOARD REF DESIGN MPC8308

MPC8308-RDB

Manufacturer Part Number
MPC8308-RDB
Description
BOARD REF DESIGN MPC8308
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MPUr

Specifications of MPC8308-RDB

Contents
Board, Cables, Documentation, Power Supply, Software
Ethernet Connection Type
Serial to Ethernet
Data Rate
10 Mbps, 100 Mbps, 1000 Mbps
Memory Type
DDR2, SDRAM
Interface Type
HSSI
Operating Voltage
1.5 V
Operating Current
5 uA
Maximum Power Dissipation
1000 mW
Operating Temperature Range
- 55 C to + 125 C
Product
Modules
For Use With/related Products
MPC8308
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 23
It assumes the DC levels of the clock driver are compatible with the device’s SerDes reference clock
input’s DC requirement.
10.2.4
The clock driver selected should provide a high quality reference clock with low phase noise and
cycle-to-cycle jitter. Phase noise less than 100 kHz can be tracked by the PLL and data recovery loops and
is less of a problem. Phase noise above 15 MHz is filtered by the PLL. The most problematic phase noise
occurs in the 1–15 MHz range. The source impedance of the clock driver should be 50 Ω to match the
transmission line and reduce reflections which are a source of noise to the system.
Table 32
Freescale Semiconductor
At recommended operating conditions with XCOREVDD= 1.0V ± 5%
Rising Edge Rate
Falling Edge Rate
Differential Input High Voltage
Differential Input Low Voltage
Single-Ended
CLK Driver Chip
Clock Driver
describes some AC parameters for PCI Express protocol.
shows the SerDes reference clock connection reference circuits for a single-ended clock driver.
AC Requirements for SerDes Reference Clocks
CLK_Out
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
Parameter
Figure 23. Single-Ended Connection (Reference Only)
33 Ω
Table 32. SerDes Reference Clock AC Parameters
Total 50 Ω. Assume clock driver’s
output impedance is about 16 Ω.
50 Ω
100 Ω differential PWB trace
Rise Edge Rate
Fall Edge Rate
Symbol
V
V
SD_REF_CLK
SD_REF_CLK
IH
IL
+200
Min
1.0
1.0
50 Ω
High-Speed Serial Interfaces (HSSI)
50 Ω
–200
Max
MPC8308
4.0
4.0
SerDes Refer.
CLK Receiver
V/ns
V/ns
Unit
mV
mV
Notes
2, 3
2, 3
2
2
33

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