MCIMX35WPDKJ Freescale Semiconductor, MCIMX35WPDKJ Datasheet - Page 12

• Manufacturer Part Number: MCIMX35WPDKJ
• Description: BOARD DEV FOR I.MX35
• Manufacturer: Freescale Semiconductor
• Series: i.MX35r
• Type: MPUr

Specifications of MCIMX35WPDKJ

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: i.MX35
• Processor Series: i.MX35
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet, USB, CAN, JTAG
• Core: ARM11
• For Use With/related Products: i.MX35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
3
Some special functional requirements are supported in the device. The details about these special functions
and the corresponding pin names are listed in
4
The following sections provide the device-level and module-level electrical characteristics for the i.MX35
processor.
4.1
This section provides the device-level electrical characteristics for the IC. See
to the individual tables and sections.
12
External ARM Clock
External Peripheral Clock
External 32-kHz Clock
Clock Out
Power Ready
Tamper Detect
ARM = ARM1136 platform, SDMA = SDMA platform
Function Name
Signal Descriptions: Special Function Related Pins
Electrical Characteristics
i.MX35 Chip-Level Conditions
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
Absolute Maximum Ratings
i.MX35 Operating Ranges
Interface Frequency
EXT_ARMCLK
CSPI1_SS1
CAPTURE
Pin Name
I2C1_CLK
GPIO1_0
GPIO1_1
CLKO
Table 5. Special Function Related Pins
Table 6. i.MX35 Chip-Level Conditions
TX1
Characteristics
Table
Mux Mode
ALT0
ALT6
ALT4
ALT2
ALT0
ALT1
ALT1
ALT6
5.
External clock input for ARM clock.
External peripheral clock source.
External clock input of 32 kHz, used when the internal
24M Oscillator is powered off, which could be
configured either from CAPTURE or CSPI1_SS1.
Clock-out pin from CCM, clock source is controllable
and can also be used for debug.
PMIC power-ready signal, which can be configured
either from GPIO1_0 or TX1.
Tamper-detect logic is used to issue a security
violation. This logic is activated if the tamper-detect
input is asserted. Tamper-detect logic is enabled by the
bit of IOMUXC_GPRA[2]. After enabling the logic, it is
impossible to disable it until the next reset.
Table 7 on page 13
Table 8 on page 13
Table 9 on page 14
Table/Location
Detailed Description
Table 6
Freescale Semiconductor
for a quick reference