MCIMX35WPDKJ Freescale Semiconductor, MCIMX35WPDKJ Datasheet - Page 53

BOARD DEV FOR I.MX35

MCIMX35WPDKJ

Manufacturer Part Number
MCIMX35WPDKJ
Description
BOARD DEV FOR I.MX35
Manufacturer
Freescale Semiconductor
Series
i.MX35r
Type
MPUr
Datasheets

Specifications of MCIMX35WPDKJ

Contents
Module and Misc Hardware
Processor To Be Evaluated
i.MX35
Processor Series
i.MX35
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet, USB, CAN, JTAG
Core
ARM11
For Use With/related Products
i.MX35
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Semiconductor
DQS (input)
SDCLK_B
DQ (input)
SDCLK
Figure 34. DDR2 SDRAM DQ vs. DQS and SDCLK READ Cycle Timing Diagram
SDR SDRAM CLK parameters are measured from the 50% point—that is,
“high” is defined as 50% of signal value and “low” is defined as 50% of
signal value. DDR SDRAM CLK parameters are measured at the crossing
point of SDCLK and SDCLK (inverted clock).
Test conditions are: Capacitance 15 pF for DDR PADS. Recommended
drive strength is Medium for SDCLK and High for Address and controls.
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
DDR26
DDR24
Table 39. DDR Single-ended Slew Rate
DATA
DATA
DDR25
NOTE
DATA
DATA
DATA
DATA
DATA
DATA
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