AD9549/PCBZ Analog Devices Inc, AD9549/PCBZ Datasheet - Page 14

• Manufacturer Part Number: AD9549/PCBZ
• Description: BOARD EVALUATION FOR AD9549
• Manufacturer: Analog Devices Inc

Specifications of AD9549/PCBZ

• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9549
• Primary Attributes: 2 Inputs, 2 Outputs, VCO
• Secondary Attributes: CMOS, HSTL Output Logic, Graphical User Interface
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9549
Figure 9. 12 kHz to 20 MHz RMS Jitter vs. System Clock PLL Input Frequency,
Figure 10. Additive Phase Noise at HSTL Output Driver, SYSCLK = 1 GHz
(SYSCLK PLL Enabled and Driven by a 25 MHz Fox Crystal Oscillator),
–100
–110
–120
–130
–140
–150
–70
–80
–90
2.0
1.5
1.0
0.5
f
0
REF
10
10
SYSCLK = 1 GHz, f
= 19.44 MHz, f
SYSTEM CLOCK PLL INPUT FREQUENCY (MHz)
100
30
1k
OUT
FREQUENCY OFFSET (Hz)
REF
RMS JITTER (12kHz TO 20MHz): 1.26ps
RMS JITTER (50kHz TO 80MHz): 1.30ps
= 155.52 MHz, DPLL Loop BW = 1 kHz
= 19.44 MHz, f
10k
50
100k
OUT
= 155.52 MHz
1M
70
10M
100M
90
Rev. D | Page 14 of 76
Figure 11. Additive Phase Noise at HSTL Output Driver, SYSCLK = 500 MHz
–100
–110
–120
–130
–140
–150
–70
–80
–90
(SYSCLK PLL Disabled), f
10
100
DPLL Loop BW = 1 kHz
FREQUENCY OFFSET (Hz)
1k
RMS JITTER (12kHz TO 20MHz): 4.2ps
REF
= 10.24 MHz, f
10k
100k
OUT
= 20.48 MHz,
1M
10M