HW-SPAR3E-SK-US-G Xilinx Inc, HW-SPAR3E-SK-US-G Datasheet - Page 49
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HW-SPAR3E-SK-US-G
Manufacturer Part Number
HW-SPAR3E-SK-US-G
Description
KIT STARTER SPARTAN-3E
Manufacturer
Xilinx Inc
Specifications of HW-SPAR3E-SK-US-G
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1507
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Table 5-3: LCD Character Display Command Set (Continued)
Spartan-3E FPGA Starter Kit Board User Guide
UG230 (v1.2) January 20, 2011
Function Set
Set CG RAM Address
Set DD RAM Address
Read Busy Flag and Address
Write Data to CG RAM or DD RAM
Read Data from CG RAM or DD RAM
R
Disabled
Clear Display
Return Cursor Home
Entry Mode Set
Function
If the LCD_E enable signal is Low, all other inputs to the LCD are ignored.
Clear the display and return the cursor to the home position, the top-left corner.
This command writes a blank space (ASCII/ANSI character code 0x20) into all DD RAM
addresses. The address counter is reset to 0, location 0x00 in DD RAM. Clears all option
settings. The I/D control bit is set to 1 (increment address counter mode) in the
Set
Execution Time: 82 μs – 1.64 ms
Return the cursor to the home position, the top-left corner. DD RAM contents are
unaffected. Also returns the display being shifted to the original position, shown in
Figure
The address counter is reset to 0, location 0x00 in DD RAM. The display is returned to its
original status if it was shifted. The cursor or blink move to the top-left character location.
Execution Time: 40 μs – 1.6 ms
Sets the cursor move direction and specifies whether or not to shift the display.
These operations are performed during data reads and writes.
Execution Time: 40 μs
Bit DB1: (I/D) Increment/Decrement
0
1
command.
Auto-decrement address counter. Cursor/blink moves to left.
Auto-increment address counter. Cursor/blink moves to right.
5-3.
0
0
0
0
1
1
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0
0
0
1
0
1
BF
D7
D7
0
0
1
Upper Nibble
A6
A6
D6
D6
0
1
A5
A5
A5
D5
D5
1
A4
A4
A4
D4
D4
0
A3
A3
A3
D3
D3
1
Lower Nibble
A2
A2
A2
D2
D2
0
LCD Controller
Entry Mode
A1
A1
A1
D1
D1
-
A0
A0
A0
D0
D0
-
49
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